Lines Matching refs:dse
140 union intel_x86_pebs_dse dse; in precise_store_data() local
143 dse.val = status; in precise_store_data()
152 if (dse.st_stlb_miss) in precise_store_data()
162 if (dse.st_l1d_hit) in precise_store_data()
170 if (dse.st_locked) in precise_store_data()
178 union perf_mem_data_src dse; in precise_datala_hsw() local
180 dse.val = PERF_MEM_NA; in precise_datala_hsw()
183 dse.mem_op = PERF_MEM_OP_STORE; in precise_datala_hsw()
185 dse.mem_op = PERF_MEM_OP_LOAD; in precise_datala_hsw()
197 dse.mem_lvl = PERF_MEM_LVL_L1 | PERF_MEM_LVL_HIT; in precise_datala_hsw()
199 dse.mem_lvl = PERF_MEM_LVL_L1 | PERF_MEM_LVL_MISS; in precise_datala_hsw()
201 return dse.val; in precise_datala_hsw()
224 union intel_x86_pebs_dse dse; in adl_latency_data_small() local
229 dse.val = status; in adl_latency_data_small()
231 val = hybrid_var(event->pmu, pebs_data_source)[dse.ld_dse]; in adl_latency_data_small()
237 pebs_set_tlb_lock(&val, dse.ld_locked, dse.ld_stlb_miss); in adl_latency_data_small()
239 if (dse.ld_data_blk) in adl_latency_data_small()
249 union intel_x86_pebs_dse dse; in load_latency_data() local
252 dse.val = status; in load_latency_data()
257 val = hybrid_var(event->pmu, pebs_data_source)[dse.ld_dse]; in load_latency_data()
267 pebs_set_tlb_lock(&val, dse.ld_stlb_miss, dse.ld_locked); in load_latency_data()
280 if (dse.ld_data_blk) in load_latency_data()
287 if (dse.ld_addr_blk) in load_latency_data()
290 if (!dse.ld_data_blk && !dse.ld_addr_blk) in load_latency_data()
298 union intel_x86_pebs_dse dse; in store_latency_data() local
302 dse.val = status; in store_latency_data()
307 val = hybrid_var(event->pmu, pebs_data_source)[dse.st_lat_dse]; in store_latency_data()
309 pebs_set_tlb_lock(&val, dse.st_lat_stlb_miss, dse.st_lat_locked); in store_latency_data()
337 u64 status, dla, dse, lat; member
349 u64 status, dla, dse, lat; member
378 u64 status, dla, dse, lat; member
1562 data->data_src.val = get_data_src(event, pebs->dse); in setup_pebs_fixed_sample_data()