99 #define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \  argument
100 661:	casa		[TSB] ASI_N, REG1, REG2; \
103 	casa		[TSB] ASI_PHYS_USE_EC, REG1, REG2; \
106 #define TSB_CAS_TAG(TSB, REG1, REG2) \  argument
107 661:	casxa		[TSB] ASI_N, REG1, REG2; \
110 	casxa		[TSB] ASI_PHYS_USE_EC, REG1, REG2; \
120 #define TSB_LOCK_TAG(TSB, REG1, REG2)	\  argument
122 	sethi	%hi(TSB_TAG_LOCK_HIGH), REG2;\
123 	andcc	REG1, REG2, %g0;	\
126 	TSB_CAS_TAG_HIGH(TSB, REG1, REG2);	\
127 	cmp	REG1, REG2;		\
156 #define KERN_PGTABLE_WALK(VADDR, REG1, REG2, FAIL_LABEL)	\  argument
159 	sllx		VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \
160 	srlx		REG2, 64 - PAGE_SHIFT, REG2; \
161 	andn		REG2, 0x7, REG2; \
162 	ldx		[REG1 + REG2], REG1; \
164 	 sllx		VADDR, 64 - (PUD_SHIFT + PUD_BITS), REG2; \
165 	srlx		REG2, 64 - PAGE_SHIFT, REG2; \
166 	andn		REG2, 0x7, REG2; \
167 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
169 	sethi		%uhi(_PAGE_PUD_HUGE), REG2; \
171 	 sllx		REG2, 32, REG2; \
172 	andcc		REG1, REG2, %g0; \
173 	sethi		%hi(0xf8000000), REG2; \
175 	 sllx		REG2, 1, REG2; \
176 	sllx		VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
177 	srlx		REG2, 64 - PAGE_SHIFT, REG2; \
178 	andn		REG2, 0x7, REG2; \
179 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
180 	sethi		%uhi(_PAGE_PMD_HUGE), REG2; \
182 	 sllx		REG2, 32, REG2; \
183 	andcc		REG1, REG2, %g0; \
185 	 sethi		%hi(0x400000), REG2; \
187 	 andn		REG1, REG2, REG1; \
188 	and		VADDR, REG2, REG2; \
190 	 or		REG1, REG2, REG1; \
191 698:	sllx		VADDR, 64 - PMD_SHIFT, REG2; \
192 	srlx		REG2, 64 - PAGE_SHIFT, REG2; \
193 	andn		REG2, 0x7, REG2; \
194 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
208 #define USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \  argument
216 	 sethi		%uhi(_PAGE_PUD_HUGE), REG2;	\
217 	sllx		REG2, 32, REG2;			\
218 	andcc		REG1, REG2, %g0;		\
220 	 sethi		%hi(0xffe00000), REG2;		\
221 	sllx		REG2, 1, REG2;			\
223 	 andn		REG1, REG2, REG1;		\
224 	and		VADDR, REG2, REG2;		\
226 	 or		REG1, REG2, REG1;		\
229 #define USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \  argument
243 #define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \  argument
245 	 sethi		%uhi(_PAGE_PMD_HUGE), REG2;	\
246 	sllx		REG2, 32, REG2;			\
247 	andcc		REG1, REG2, %g0;		\
249 	 sethi		%hi(4 * 1024 * 1024), REG2;	\
251 	 andn		REG1, REG2, REG1;		\
252 	and		VADDR, REG2, REG2;		\
254 	 or		REG1, REG2, REG1;		\
257 #define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \  argument
271 #define USER_PGTABLE_WALK_TL1(VADDR, PHYS_PGD, REG1, REG2, FAIL_LABEL)	\  argument
272 	sllx		VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \
273 	srlx		REG2, 64 - PAGE_SHIFT, REG2; \
274 	andn		REG2, 0x7, REG2; \
275 	ldxa		[PHYS_PGD + REG2] ASI_PHYS_USE_EC, REG1; \
277 	 sllx		VADDR, 64 - (PUD_SHIFT + PUD_BITS), REG2; \
278 	srlx		REG2, 64 - PAGE_SHIFT, REG2; \
279 	andn		REG2, 0x7, REG2; \
280 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
281 	USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, 800f) \
283 	 sllx		VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
284 	srlx		REG2, 64 - PAGE_SHIFT, REG2; \
285 	andn		REG2, 0x7, REG2; \
286 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
287 	USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, 800f) \
288 	sllx		VADDR, 64 - PMD_SHIFT, REG2; \
289 	srlx		REG2, 64 - PAGE_SHIFT, REG2; \
290 	andn		REG2, 0x7, REG2; \
291 	add		REG1, REG2, REG1; \
302 #define OBP_TRANS_LOOKUP(VADDR, REG1, REG2, REG3, FAIL_LABEL) \  argument
305 97:	ldx		[REG1 + 0x00], REG2; \
306 	brz,pn		REG2, FAIL_LABEL; \
309 	add		REG2, REG3, REG3; \
310 	cmp		REG2, VADDR; \
315 	sub		VADDR, REG2, REG2; \
317 	 add		REG3, REG2, REG1; \
338 #define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \  argument
340 	sethi		%hi(swapper_tsb), REG2; \
342 	or		REG2, %lo(swapper_tsb), REG2; \
347 	or		REG1, REG2, REG1; \
348 	srlx		VADDR, PAGE_SHIFT, REG2; \
349 	and		REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \
350 	sllx		REG2, 4, REG2; \
351 	add		REG1, REG2, REG2; \
352 	TSB_LOAD_QUAD(REG2, REG3); \
361 #define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \  argument
363 	sethi		%hi(swapper_4m_tsb), REG2; \
365 	or		REG2, %lo(swapper_4m_tsb), REG2; \
370 	or		REG1, REG2, REG1; \
371 	and		TAG, (KERNEL_TSB4M_NENTRIES - 1), REG2; \
372 	sllx		REG2, 4, REG2; \
373 	add		REG1, REG2, REG2; \
374 	TSB_LOAD_QUAD(REG2, REG3); \