Lines Matching refs:CLKDEV_CON_ID
118 CLKDEV_CON_ID("extal", &extal_clk),
119 CLKDEV_CON_ID("pll_clk", &pll_clk),
122 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
123 CLKDEV_CON_ID("du_clk", &div4_clks[DIV4_DU]),
124 CLKDEV_CON_ID("ga_clk", &div4_clks[DIV4_GA]),
125 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_DDR]),
126 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
127 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
128 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
129 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
139 CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP021]),
140 CLKDEV_CON_ID("ssi0_fck", &mstp_clks[MSTP020]),
141 CLKDEV_CON_ID("hac1_fck", &mstp_clks[MSTP017]),
142 CLKDEV_CON_ID("hac0_fck", &mstp_clks[MSTP016]),
143 CLKDEV_CON_ID("mmcif_fck", &mstp_clks[MSTP013]),
144 CLKDEV_CON_ID("flctl_fck", &mstp_clks[MSTP012]),
149 CLKDEV_CON_ID("siof_fck", &mstp_clks[MSTP003]),
150 CLKDEV_CON_ID("hspi_fck", &mstp_clks[MSTP002]),
151 CLKDEV_CON_ID("hudi_fck", &mstp_clks[MSTP119]),
152 CLKDEV_CON_ID("ubc0", &mstp_clks[MSTP117]),
153 CLKDEV_CON_ID("dmac_11_6_fck", &mstp_clks[MSTP105]),
154 CLKDEV_CON_ID("dmac_5_0_fck", &mstp_clks[MSTP104]),
155 CLKDEV_CON_ID("gdta_fck", &mstp_clks[MSTP100]),