29 static struct ipic * primary_ipic;
516 static inline struct ipic * ipic_from_irq(unsigned int virq)  in ipic_from_irq()
523 	struct ipic *ipic = ipic_from_irq(d->irq);  in ipic_unmask_irq()  local
530 	temp = ipic_read(ipic->regs, ipic_info[src].mask);  in ipic_unmask_irq()
532 	ipic_write(ipic->regs, ipic_info[src].mask, temp);  in ipic_unmask_irq()
539 	struct ipic *ipic = ipic_from_irq(d->irq);  in ipic_mask_irq()  local
546 	temp = ipic_read(ipic->regs, ipic_info[src].mask);  in ipic_mask_irq()
548 	ipic_write(ipic->regs, ipic_info[src].mask, temp);  in ipic_mask_irq()
559 	struct ipic *ipic = ipic_from_irq(d->irq);  in ipic_ack_irq()  local
567 	ipic_write(ipic->regs, ipic_info[src].ack, temp);  in ipic_ack_irq()
578 	struct ipic *ipic = ipic_from_irq(d->irq);  in ipic_mask_irq_and_ack()  local
585 	temp = ipic_read(ipic->regs, ipic_info[src].mask);  in ipic_mask_irq_and_ack()
587 	ipic_write(ipic->regs, ipic_info[src].mask, temp);  in ipic_mask_irq_and_ack()
590 	ipic_write(ipic->regs, ipic_info[src].ack, temp);  in ipic_mask_irq_and_ack()
601 	struct ipic *ipic = ipic_from_irq(d->irq);  in ipic_set_irq_type()  local
643 	vold = ipic_read(ipic->regs, IPIC_SECNR);  in ipic_set_irq_type()
650 		ipic_write(ipic->regs, IPIC_SECNR, vnew);  in ipic_set_irq_type()
683 	struct ipic *ipic = h->host_data;  in ipic_host_map()  local
685 	irq_set_chip_data(virq, ipic);  in ipic_host_map()
700 struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)  in ipic_init()
702 	struct ipic	*ipic;  in ipic_init()  local
710 	ipic = kzalloc(sizeof(*ipic), GFP_KERNEL);  in ipic_init()
711 	if (ipic == NULL)  in ipic_init()
714 	ipic->irqhost = irq_domain_add_linear(node, NR_IPIC_INTS,  in ipic_init()
715 					      &ipic_host_ops, ipic);  in ipic_init()
716 	if (ipic->irqhost == NULL) {  in ipic_init()
717 		kfree(ipic);  in ipic_init()
721 	ipic->regs = ioremap(res.start, resource_size(&res));  in ipic_init()
724 	ipic_write(ipic->regs, IPIC_SICNR, 0x0);  in ipic_init()
741 	ipic_write(ipic->regs, IPIC_SICFR, temp);  in ipic_init()
747 	ipic_write(ipic->regs, IPIC_SERCR, temp);  in ipic_init()
750 	temp = ipic_read(ipic->regs, IPIC_SEMSR);  in ipic_init()
757 	ipic_write(ipic->regs, IPIC_SEMSR, temp);  in ipic_init()
759 	primary_ipic = ipic;  in ipic_init()
762 	ipic_write(ipic->regs, IPIC_SIMSR_H, 0);  in ipic_init()
763 	ipic_write(ipic->regs, IPIC_SIMSR_L, 0);  in ipic_init()
768 	return ipic;  in ipic_init()
822 	struct ipic *ipic = primary_ipic;  in ipic_suspend()  local
824 	ipic_saved_state.sicfr = ipic_read(ipic->regs, IPIC_SICFR);  in ipic_suspend()
825 	ipic_saved_state.siprr[0] = ipic_read(ipic->regs, IPIC_SIPRR_A);  in ipic_suspend()
826 	ipic_saved_state.siprr[1] = ipic_read(ipic->regs, IPIC_SIPRR_D);  in ipic_suspend()
827 	ipic_saved_state.simsr[0] = ipic_read(ipic->regs, IPIC_SIMSR_H);  in ipic_suspend()
828 	ipic_saved_state.simsr[1] = ipic_read(ipic->regs, IPIC_SIMSR_L);  in ipic_suspend()
829 	ipic_saved_state.sicnr = ipic_read(ipic->regs, IPIC_SICNR);  in ipic_suspend()
830 	ipic_saved_state.smprr[0] = ipic_read(ipic->regs, IPIC_SMPRR_A);  in ipic_suspend()
831 	ipic_saved_state.smprr[1] = ipic_read(ipic->regs, IPIC_SMPRR_B);  in ipic_suspend()
832 	ipic_saved_state.semsr = ipic_read(ipic->regs, IPIC_SEMSR);  in ipic_suspend()
833 	ipic_saved_state.secnr = ipic_read(ipic->regs, IPIC_SECNR);  in ipic_suspend()
834 	ipic_saved_state.sermr = ipic_read(ipic->regs, IPIC_SERMR);  in ipic_suspend()
835 	ipic_saved_state.sercr = ipic_read(ipic->regs, IPIC_SERCR);  in ipic_suspend()
842 		ipic_write(ipic->regs, IPIC_SIMSR_H, 0);  in ipic_suspend()
843 		ipic_write(ipic->regs, IPIC_SIMSR_L, 0);  in ipic_suspend()
844 		ipic_write(ipic->regs, IPIC_SEMSR, 0);  in ipic_suspend()
845 		ipic_write(ipic->regs, IPIC_SERMR, 0);  in ipic_suspend()
853 	struct ipic *ipic = primary_ipic;  in ipic_resume()  local
855 	ipic_write(ipic->regs, IPIC_SICFR, ipic_saved_state.sicfr);  in ipic_resume()
856 	ipic_write(ipic->regs, IPIC_SIPRR_A, ipic_saved_state.siprr[0]);  in ipic_resume()
857 	ipic_write(ipic->regs, IPIC_SIPRR_D, ipic_saved_state.siprr[1]);  in ipic_resume()
858 	ipic_write(ipic->regs, IPIC_SIMSR_H, ipic_saved_state.simsr[0]);  in ipic_resume()
859 	ipic_write(ipic->regs, IPIC_SIMSR_L, ipic_saved_state.simsr[1]);  in ipic_resume()
860 	ipic_write(ipic->regs, IPIC_SICNR, ipic_saved_state.sicnr);  in ipic_resume()
861 	ipic_write(ipic->regs, IPIC_SMPRR_A, ipic_saved_state.smprr[0]);  in ipic_resume()
862 	ipic_write(ipic->regs, IPIC_SMPRR_B, ipic_saved_state.smprr[1]);  in ipic_resume()
863 	ipic_write(ipic->regs, IPIC_SEMSR, ipic_saved_state.semsr);  in ipic_resume()
864 	ipic_write(ipic->regs, IPIC_SECNR, ipic_saved_state.secnr);  in ipic_resume()
865 	ipic_write(ipic->regs, IPIC_SERMR, ipic_saved_state.sermr);  in ipic_resume()
866 	ipic_write(ipic->regs, IPIC_SERCR, ipic_saved_state.sercr);  in ipic_resume()