Lines Matching refs:r9
68 lwz r9,_MSR(r11) /* if sleeping, clear MSR.EE */
69 rlwinm r9,r9,0,~MSR_EE
79 lwz r9, THREAD+THSR0(r2)
80 update_user_segments_by_4 r9, r10, r11, r12
84 lwz r9, THREAD+THSR0(r2)
85 rlwinm r9,r9,0,~SR_NX
86 update_user_segments_by_4 r9, r10, r11, r12
110 rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
115 stw r9,_MSR(r1)
257 andi. r10,r9,MSR_RI /* check for recoverable interrupt */
273 mtspr SPRN_SRR1,r9
402 mtspr SPRN_SPRG_WSCRATCH0, r9
404 mtspr SPRN_SPRG_SCRATCH0, r9
406 addi r9,r1,INT_FRAME_SIZE /* get original r1 */
410 stw r9,0(r1) /* perform store component of stwu */
412 mfspr r9, SPRN_SPRG_RSCRATCH0
414 mfspr r9, SPRN_SPRG_SCRATCH0
466 lwz r9,_DEAR(r1); \
468 mtspr SPRN_DEAR,r9; \
480 lwz r9,_##exc_lvl_srr0(r1); \
482 mtspr SPRN_##exc_lvl_srr0,r9; \
494 lwz r9,MAS0(r1); \
497 mtspr SPRN_MAS0,r9; \
498 lwz r9,MAS3(r1); \
502 mtspr SPRN_MAS3,r9; \
507 lwz r9,MMUCR(r1); \
508 mtspr SPRN_MMUCR,r9;
516 lis r9,crit_srr0@ha;
517 lwz r9,crit_srr0@l(r9);
520 mtspr SPRN_SRR0,r9;