Lines Matching refs:mfdcr
106 banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B0BAS)); in ibm440spe_fixup_memsize()
109 banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B1BAS)); in ibm440spe_fixup_memsize()
112 banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B2BAS)); in ibm440spe_fixup_memsize()
115 banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B3BAS)); in ibm440spe_fixup_memsize()
297 while (mfdcr(DCRN_MAL0_CFG) & MAL_RESET) in ibm4xx_quiesce_eth()
313 bxcr = mfdcr(DCRN_EBC0_CFGDATA); in ibm4xx_fixup_ebc_ranges()
333 u32 sys0 = mfdcr(DCRN_CPC0_SYS0); in ibm440gp_fixup_clocks()
334 u32 cr0 = mfdcr(DCRN_CPC0_CR0); in ibm440gp_fixup_clocks()
550 u32 pllmr = mfdcr(DCRN_CPC0_PLLMR); in ibm405gp_fixup_clocks()
551 u32 cpc0_cr0 = mfdcr(DCRN_405_CPC0_CR0); in ibm405gp_fixup_clocks()
552 u32 cpc0_cr1 = mfdcr(DCRN_405_CPC0_CR1); in ibm405gp_fixup_clocks()
553 u32 psr = mfdcr(DCRN_405_CPC0_PSR); in ibm405gp_fixup_clocks()
623 u32 pllmr0 = mfdcr(DCRN_CPC0_PLLMR0); in ibm405ep_fixup_clocks()
624 u32 pllmr1 = mfdcr(DCRN_CPC0_PLLMR1); in ibm405ep_fixup_clocks()
625 u32 cpc0_ucr = mfdcr(DCRN_CPC0_UCR); in ibm405ep_fixup_clocks()