32 	struct bridge_controller *bc = BRIDGE_CONTROLLER(pdev->bus);  in phys_to_dma()  local
34 	return bc->baddr + paddr;  in phys_to_dma()
97 	struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);  in bridge_disable_swapping()  local
101 	bridge_clr(bc, b_device[slot].reg, BRIDGE_DEV_SWAP_DIR);  in bridge_disable_swapping()
102 	bridge_read(bc, b_widget.w_tflush);	/* Flush */  in bridge_disable_swapping()
122 	struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);  in pci_conf0_read_config()  local
123 	struct bridge_regs *bridge = bc->base;  in pci_conf0_read_config()
141 				   bc->ioc3_sid[slot]);  in pci_conf0_read_config()
159 	struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);  in pci_conf1_read_config()  local
160 	struct bridge_regs *bridge = bc->base;  in pci_conf1_read_config()
168 	bridge_write(bc, b_pci_cfg, (busno << 16) | (slot << 11));  in pci_conf1_read_config()
180 				   bc->ioc3_sid[slot]);  in pci_conf1_read_config()
207 	struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);  in pci_conf0_write_config()  local
208 	struct bridge_regs *bridge = bc->base;  in pci_conf0_write_config()
246 	struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);  in pci_conf1_write_config()  local
247 	struct bridge_regs *bridge = bc->base;  in pci_conf1_write_config()
255 	bridge_write(bc, b_pci_cfg, (busno << 16) | (slot << 11));  in pci_conf1_write_config()
299 	struct bridge_controller *bc;  member
316 		bridge_write(data->bc, b_int_addr[pin].addr,  in bridge_set_affinity()
317 			     (((data->bc->intr_addr >> 30) & 0x30000) |  in bridge_set_affinity()
319 		bridge_read(data->bc, b_wid_tflush);  in bridge_set_affinity()
350 		data->bc = info->ctrl;  in bridge_domain_alloc()
377 	struct bridge_controller *bc = data->bc;  in bridge_domain_activate()  local
382 	bridge_write(bc, b_int_addr[pin].addr,  in bridge_domain_activate()
383 		     (((bc->intr_addr >> 30) & 0x30000) |  in bridge_domain_activate()
385 	bridge_set(bc, b_int_enable, (1 << pin));  in bridge_domain_activate()
386 	bridge_set(bc, b_int_enable, 0x7ffffe00); /* more stuff in int_enable */  in bridge_domain_activate()
395 	bridge_set(bc, b_int_mode, (1UL << pin));  in bridge_domain_activate()
401 	device = bridge_read(bc, b_int_device);  in bridge_domain_activate()
404 	bridge_write(bc, b_int_device, device);  in bridge_domain_activate()
406 	bridge_read(bc, b_wid_tflush);  in bridge_domain_activate()
415 	bridge_clr(data->bc, b_int_enable, (1 << irqd->hwirq));  in bridge_domain_deactivate()
416 	bridge_read(data->bc, b_wid_tflush);  in bridge_domain_deactivate()
437 	struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);  in bridge_map_irq()  local
452 	irq = bc->pci_int[slot][pin];  in bridge_map_irq()
454 		info.ctrl = bc;  in bridge_map_irq()
455 		info.nasid = bc->nasid;  in bridge_map_irq()
456 		info.pin = bc->int_mapping[slot][pin];  in bridge_map_irq()
458 		irq = irq_domain_alloc_irqs(bc->domain, 1, bc->nasid, &info);  in bridge_map_irq()
462 		bc->pci_int[slot][pin] = irq;  in bridge_map_irq()
469 static void bridge_setup_ip27_baseio6g(struct bridge_controller *bc)  in bridge_setup_ip27_baseio6g()  argument
471 	bc->ioc3_sid[2] = IOC3_SID(IOC3_SUBSYS_IP27_BASEIO6G);  in bridge_setup_ip27_baseio6g()
472 	bc->ioc3_sid[6] = IOC3_SID(IOC3_SUBSYS_IP27_MIO);  in bridge_setup_ip27_baseio6g()
473 	bc->int_mapping[2][1] = 4;  in bridge_setup_ip27_baseio6g()
474 	bc->int_mapping[6][1] = 6;  in bridge_setup_ip27_baseio6g()
477 static void bridge_setup_ip27_baseio(struct bridge_controller *bc)  in bridge_setup_ip27_baseio()  argument
479 	bc->ioc3_sid[2] = IOC3_SID(IOC3_SUBSYS_IP27_BASEIO);  in bridge_setup_ip27_baseio()
480 	bc->int_mapping[2][1] = 4;  in bridge_setup_ip27_baseio()
483 static void bridge_setup_ip29_baseio(struct bridge_controller *bc)  in bridge_setup_ip29_baseio()  argument
485 	bc->ioc3_sid[2] = IOC3_SID(IOC3_SUBSYS_IP29_SYSBOARD);  in bridge_setup_ip29_baseio()
486 	bc->int_mapping[2][1] = 3;  in bridge_setup_ip29_baseio()
489 static void bridge_setup_ip30_sysboard(struct bridge_controller *bc)  in bridge_setup_ip30_sysboard()  argument
491 	bc->ioc3_sid[2] = IOC3_SID(IOC3_SUBSYS_IP30_SYSBOARD);  in bridge_setup_ip30_sysboard()
492 	bc->int_mapping[2][1] = 4;  in bridge_setup_ip30_sysboard()
495 static void bridge_setup_menet(struct bridge_controller *bc)  in bridge_setup_menet()  argument
497 	bc->ioc3_sid[0] = IOC3_SID(IOC3_SUBSYS_MENET);  in bridge_setup_menet()
498 	bc->ioc3_sid[1] = IOC3_SID(IOC3_SUBSYS_MENET);  in bridge_setup_menet()
499 	bc->ioc3_sid[2] = IOC3_SID(IOC3_SUBSYS_MENET);  in bridge_setup_menet()
500 	bc->ioc3_sid[3] = IOC3_SID(IOC3_SUBSYS_MENET4);  in bridge_setup_menet()
503 static void bridge_setup_io7(struct bridge_controller *bc)  in bridge_setup_io7()  argument
505 	bc->ioc3_sid[4] = IOC3_SID(IOC3_SUBSYS_IO7);  in bridge_setup_io7()
508 static void bridge_setup_io8(struct bridge_controller *bc)  in bridge_setup_io8()  argument
510 	bc->ioc3_sid[4] = IOC3_SID(IOC3_SUBSYS_IO8);  in bridge_setup_io8()
513 static void bridge_setup_io9(struct bridge_controller *bc)  in bridge_setup_io9()  argument
515 	bc->ioc3_sid[1] = IOC3_SID(IOC3_SUBSYS_IO9);  in bridge_setup_io9()
518 static void bridge_setup_ip34_fuel_sysboard(struct bridge_controller *bc)  in bridge_setup_ip34_fuel_sysboard()  argument
520 	bc->ioc3_sid[4] = IOC3_SID(IOC3_SUBSYS_IP34_SYSBOARD);  in bridge_setup_ip34_fuel_sysboard()
528 	void (*setup)(struct bridge_controller *bc);
546 static void bridge_setup_board(struct bridge_controller *bc, char *partnum)  in bridge_setup_board()  argument
553 			bridge_ioc3_devid[i].setup(bc);  in bridge_setup_board()
611 	struct bridge_controller *bc;  in bridge_probe()  local
638 	host = devm_pci_alloc_host_bridge(dev, sizeof(*bc));  in bridge_probe()
644 	bc = pci_host_bridge_priv(host);  in bridge_probe()
646 	bc->busn.name		= "Bridge PCI busn";  in bridge_probe()
647 	bc->busn.start		= 0;  in bridge_probe()
648 	bc->busn.end		= 0xff;  in bridge_probe()
649 	bc->busn.flags		= IORESOURCE_BUS;  in bridge_probe()
651 	bc->domain		= domain;  in bridge_probe()
655 	pci_add_resource(&host->windows, &bc->busn);  in bridge_probe()
661 	bc->nasid = bd->nasid;  in bridge_probe()
663 	bc->baddr = (u64)bd->masterwid << 60 | PCI64_ATTR_BAR;  in bridge_probe()
664 	bc->base = (struct bridge_regs *)bd->bridge_addr;  in bridge_probe()
665 	bc->intr_addr = bd->intr_addr;  in bridge_probe()
670 	bridge_write(bc, b_int_rst_stat, BRIDGE_IRR_ALL_CLR);  in bridge_probe()
675 	bridge_write(bc, b_int_device, 0x0);  in bridge_probe()
680 	bridge_clr(bc, b_wid_control,  in bridge_probe()
683 	bridge_clr(bc, b_wid_control, BRIDGE_CTRL_PAGE_SIZE);  in bridge_probe()
685 	bridge_set(bc, b_wid_control, BRIDGE_CTRL_PAGE_SIZE);  in bridge_probe()
692 	bridge_write(bc, b_wid_int_upper,  in bridge_probe()
693 		     ((bc->intr_addr >> 32) & 0xffff) | (bd->masterwid << 16));  in bridge_probe()
694 	bridge_write(bc, b_wid_int_lower, bc->intr_addr & 0xffffffff);  in bridge_probe()
695 	bridge_write(bc, b_dir_map, (bd->masterwid << 20));	/* DMA */  in bridge_probe()
696 	bridge_write(bc, b_int_enable, 0);  in bridge_probe()
699 		bridge_set(bc, b_device[slot].reg, BRIDGE_DEV_SWAP_DIR);  in bridge_probe()
700 		bc->pci_int[slot][0] = -1;  in bridge_probe()
701 		bc->pci_int[slot][1] = -1;  in bridge_probe()
703 		bc->int_mapping[slot][0] = slot;  in bridge_probe()
704 		bc->int_mapping[slot][1] = slot ^ 4;  in bridge_probe()
706 	bridge_read(bc, b_wid_tflush);	  /* wait until Bridge PIO complete */  in bridge_probe()
708 	bridge_setup_board(bc, partnum);  in bridge_probe()
711 	host->sysdata = bc;  in bridge_probe()
739 	struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);  in bridge_remove()  local
740 	struct fwnode_handle *fn = bc->domain->fwnode;  in bridge_remove()
742 	irq_domain_remove(bc->domain);  in bridge_remove()