148 	u32 ref_div;  in ar933x_clocks_init()  local
167 		ref_div = 1;  in ar933x_clocks_init()
182 		ref_div = t;  in ar933x_clocks_init()
205 			 ref_div * out_div * cpu_div);  in ar933x_clocks_init()
207 			 ref_div * out_div * ddr_div);  in ar933x_clocks_init()
209 			 ref_div * out_div * ahb_div);  in ar933x_clocks_init()
212 static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac,  in ar934x_get_pll_freq()  argument
220 	do_div(t, ref_div);  in ar934x_get_pll_freq()
225 	do_div(t, ref_div * frac);  in ar934x_get_pll_freq()
238 	u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv;  in ar934x_clocks_init()  local
261 		ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) &  in ar934x_clocks_init()
268 		ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) &  in ar934x_clocks_init()
277 	cpu_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint,  in ar934x_clocks_init()
288 		ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) &  in ar934x_clocks_init()
295 		ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) &  in ar934x_clocks_init()
304 	ddr_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint,  in ar934x_clocks_init()
356 	u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;  in qca953x_clocks_init()  local
371 	ref_div = (pll >> QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT) &  in qca953x_clocks_init()
378 	cpu_pll = nint * ref_rate / ref_div;  in qca953x_clocks_init()
379 	cpu_pll += frac * (ref_rate >> 6) / ref_div;  in qca953x_clocks_init()
385 	ref_div = (pll >> QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT) &  in qca953x_clocks_init()
392 	ddr_pll = nint * ref_rate / ref_div;  in qca953x_clocks_init()
393 	ddr_pll += frac * (ref_rate >> 6) / (ref_div << 4);  in qca953x_clocks_init()
439 	u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;  in qca955x_clocks_init()  local
454 	ref_div = (pll >> QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT) &  in qca955x_clocks_init()
461 	cpu_pll = nint * ref_rate / ref_div;  in qca955x_clocks_init()
462 	cpu_pll += frac * ref_rate / (ref_div * (1 << 6));  in qca955x_clocks_init()
468 	ref_div = (pll >> QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT) &  in qca955x_clocks_init()
475 	ddr_pll = nint * ref_rate / ref_div;  in qca955x_clocks_init()
476 	ddr_pll += frac * ref_rate / (ref_div * (1 << 10));  in qca955x_clocks_init()
522 	u32 pll, out_div, ref_div, nint, hfrac, lfrac, clk_ctrl, postdiv;  in qca956x_clocks_init()  local
547 	ref_div = (pll >> QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT) &  in qca956x_clocks_init()
558 	cpu_pll = nint * ref_rate / ref_div;  in qca956x_clocks_init()
559 	cpu_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13);  in qca956x_clocks_init()
560 	cpu_pll += (hfrac >> 13) * ref_rate / ref_div;  in qca956x_clocks_init()
566 	ref_div = (pll >> QCA956X_PLL_DDR_CONFIG_REFDIV_SHIFT) &  in qca956x_clocks_init()
576 	ddr_pll = nint * ref_rate / ref_div;  in qca956x_clocks_init()
577 	ddr_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13);  in qca956x_clocks_init()
578 	ddr_pll += (hfrac >> 13) * ref_rate / ref_div;  in qca956x_clocks_init()