Lines Matching refs:bus_clk
92 static struct clk_rate bus_clk = { variable
211 int base_clock = bus_clk.rate; in tnetd7300_set_clock()
215 base_clock = bus_clk.rate; in tnetd7300_set_clock()
248 bus_clk.rate = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT, in tnetd7300_init_clocks()
255 cpu_clk.rate = bus_clk.rate; in tnetd7300_init_clocks()
351 bus_clk.rate = in tnetd7200_init_clocks()
355 bus_clk.rate); in tnetd7200_init_clocks()
382 bus_clk.rate = cpu_clk.rate / 2; in tnetd7200_init_clocks()
385 dsp_mul * 2, bus_clk.rate); in tnetd7200_init_clocks()
392 bus_clk.rate = ((dsp_base / dsp_prediv) * dsp_mul) in tnetd7200_init_clocks()
396 dsp_mul * 2, bus_clk.rate); in tnetd7200_init_clocks()
398 cpu_clk.rate = bus_clk.rate; in tnetd7200_init_clocks()
402 usb_base = bus_clk.rate; in tnetd7200_init_clocks()
432 clk = clk_register_fixed_rate(NULL, "bus", NULL, 0, bus_clk.rate); in ar7_init_clocks()