Lines Matching refs:r24
188 ITC_I_AND_D(p10, p11, r18, r24) // insert the instruction TLB entry and
191 MOV_TO_IFA(r22, r24)
194 MOV_TO_ITIR(p8, r25, r24) // change to default page-size for VHPT
202 adds r24=__DIRTY_BITS_NO_ED|_PAGE_PL_0|_PAGE_AR_RW,r23
204 ITC_D(p7, r24, r25)
386 mov r24=PERCPU_ADDR
399 cmp.ge p10,p11=r16,r24 // access to per_cpu_data?
414 MOV_TO_ITIR(p10, r25, r24)
423 MOV_TO_IPSR(p6, r21, r24)
557 mov r24=PAGE_SHIFT<<2
573 (p7) ptc.l r16,r24
623 mov r24=PAGE_SHIFT<<2
639 (p7) ptc.l r16,r24
678 mov r24=PAGE_SHIFT<<2
693 (p7) ptc.l r16,r24
742 mov.m r24=ar.rnat // M2 (5 cyc)
869 mov ar.rnat=r24 // M2 restore kernel's AR.RNAT
991 (pUStk) st8 [r16]=r24,PT(PR)-PT(AR_RNAT) // save ar.rnat
1555 SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(r15, r24)
1603 SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(r3, r24)
1663 SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(r3, r24)