Lines Matching refs:x0
73 cmp x0, #HVC_SET_VECTORS
78 1: cmp x0, #HVC_FINALISE_EL2
81 2: cmp x0, #HVC_SOFT_RESTART
83 mov x0, x2
89 3: cmp x0, #HVC_RESET_VECTORS
93 mov_q x0, HVC_STUB_ERR
96 9: mov x0, xzr
104 mrs x0, cptr_el2 // Disable SVE traps
105 bic x0, x0, #CPTR_EL2_TZ
106 msr cptr_el2, x0
115 mrs x0, cptr_el2 // Disable SME traps
116 bic x0, x0, #CPTR_EL2_TSM
117 msr cptr_el2, x0
125 mov x0, #0 // SMCR controls
132 orr x0, x0, SMCR_ELx_FA64_MASK
135 orr x0, x0, #SMCR_ELx_LEN_MASK // Enable full SME vector
136 msr_s SYS_SMCR_EL2, x0 // length for EL1.
162 1: mov_q x0, HVC_STUB_ERR
166 mov_q x0, HCR_HOST_VHE_FLAGS
167 msr hcr_el2, x0
171 mrs x0, sp_el1
172 mov sp, x0
173 mrs x0, tpidr_el1
174 msr tpidr_el2, x0
177 mrs_s x0, SYS_CPACR_EL12
178 msr cpacr_el1, x0
179 mrs_s x0, SYS_VBAR_EL12
180 msr vbar_el1, x0
183 mrs x0, mdcr_el2
184 bic x0, x0, #(MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT)
185 bic x0, x0, #(MDCR_EL2_E2TB_MASK << MDCR_EL2_E2TB_SHIFT)
186 msr mdcr_el2, x0
189 mrs_s x0, SYS_TCR_EL12
190 msr tcr_el1, x0
191 mrs_s x0, SYS_TTBR0_EL12
192 msr ttbr0_el1, x0
193 mrs_s x0, SYS_TTBR1_EL12
194 msr ttbr1_el1, x0
195 mrs_s x0, SYS_MAIR_EL12
196 msr mair_el1, x0
200 mrs x0, spsr_el1
201 and x0, x0, #~PSR_MODE_MASK
203 orr x0, x0, x1
204 msr spsr_el1, x0
223 mrs_s x0, SYS_SCTLR_EL12
224 set_sctlr_el1 x0
227 mov_q x0, INIT_SCTLR_EL1_MMU_OFF
228 msr_s SYS_SCTLR_EL12, x0
230 mov x0, xzr
276 mov x1, x0
277 mov x0, #HVC_SET_VECTORS
283 mov x0, #HVC_RESET_VECTORS
299 mrs x0, CurrentEL
300 cmp x0, #CurrentEL_EL1
303 mov x0, #HVC_FINALISE_EL2