Lines Matching refs:CPG_MOD
180 clocks = <&cpg CPG_MOD R9A07G044_SSI0_PCLK2>,
181 <&cpg CPG_MOD R9A07G044_SSI0_PCLK_SFR>,
201 clocks = <&cpg CPG_MOD R9A07G044_SSI1_PCLK2>,
202 <&cpg CPG_MOD R9A07G044_SSI1_PCLK_SFR>,
222 clocks = <&cpg CPG_MOD R9A07G044_SSI2_PCLK2>,
223 <&cpg CPG_MOD R9A07G044_SSI2_PCLK_SFR>,
243 clocks = <&cpg CPG_MOD R9A07G044_SSI3_PCLK2>,
244 <&cpg CPG_MOD R9A07G044_SSI3_PCLK_SFR>,
262 clocks = <&cpg CPG_MOD R9A07G044_RSPI0_CLKB>;
280 clocks = <&cpg CPG_MOD R9A07G044_RSPI1_CLKB>;
298 clocks = <&cpg CPG_MOD R9A07G044_RSPI2_CLKB>;
320 clocks = <&cpg CPG_MOD R9A07G044_SCIF0_CLK_PCK>;
338 clocks = <&cpg CPG_MOD R9A07G044_SCIF1_CLK_PCK>;
356 clocks = <&cpg CPG_MOD R9A07G044_SCIF2_CLK_PCK>;
374 clocks = <&cpg CPG_MOD R9A07G044_SCIF3_CLK_PCK>;
392 clocks = <&cpg CPG_MOD R9A07G044_SCIF4_CLK_PCK>;
407 clocks = <&cpg CPG_MOD R9A07G044_SCI0_CLKP>;
422 clocks = <&cpg CPG_MOD R9A07G044_SCI1_CLKP>;
443 clocks = <&cpg CPG_MOD R9A07G044_CANFD_PCLK>,
478 clocks = <&cpg CPG_MOD R9A07G044_I2C0_PCLK>;
500 clocks = <&cpg CPG_MOD R9A07G044_I2C1_PCLK>;
522 clocks = <&cpg CPG_MOD R9A07G044_I2C2_PCLK>;
544 clocks = <&cpg CPG_MOD R9A07G044_I2C3_PCLK>;
555 clocks = <&cpg CPG_MOD R9A07G044_ADC_ADCLK>,
556 <&cpg CPG_MOD R9A07G044_ADC_PCLK>;
597 clocks = <&cpg CPG_MOD R9A07G044_TSU_PCLK>;
611 clocks = <&cpg CPG_MOD R9A07G044_SPI_CLK2>,
612 <&cpg CPG_MOD R9A07G044_SPI_CLK>;
652 clocks = <&cpg CPG_MOD R9A07G044_GPIO_HCLK>;
707 clocks = <&cpg CPG_MOD R9A07G044_IA55_CLK>,
708 <&cpg CPG_MOD R9A07G044_IA55_PCLK>;
741 clocks = <&cpg CPG_MOD R9A07G044_DMAC_ACLK>,
742 <&cpg CPG_MOD R9A07G044_DMAC_PCLK>;
759 clocks = <&cpg CPG_MOD R9A07G044_GPU_CLK>,
760 <&cpg CPG_MOD R9A07G044_GPU_AXI_CLK>,
761 <&cpg CPG_MOD R9A07G044_GPU_ACE_CLK>;
787 clocks = <&cpg CPG_MOD R9A07G044_SDHI0_IMCLK>,
788 <&cpg CPG_MOD R9A07G044_SDHI0_CLK_HS>,
789 <&cpg CPG_MOD R9A07G044_SDHI0_IMCLK2>,
790 <&cpg CPG_MOD R9A07G044_SDHI0_ACLK>;
803 clocks = <&cpg CPG_MOD R9A07G044_SDHI1_IMCLK>,
804 <&cpg CPG_MOD R9A07G044_SDHI1_CLK_HS>,
805 <&cpg CPG_MOD R9A07G044_SDHI1_IMCLK2>,
806 <&cpg CPG_MOD R9A07G044_SDHI1_ACLK>;
822 clocks = <&cpg CPG_MOD R9A07G044_ETH0_CLK_AXI>,
823 <&cpg CPG_MOD R9A07G044_ETH0_CLK_CHI>,
842 clocks = <&cpg CPG_MOD R9A07G044_ETH1_CLK_AXI>,
843 <&cpg CPG_MOD R9A07G044_ETH1_CLK_CHI>,
857 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>;
868 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
869 <&cpg CPG_MOD R9A07G044_USB_U2H0_HCLK>;
882 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
883 <&cpg CPG_MOD R9A07G044_USB_U2H1_HCLK>;
896 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
897 <&cpg CPG_MOD R9A07G044_USB_U2H0_HCLK>;
911 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
912 <&cpg CPG_MOD R9A07G044_USB_U2H1_HCLK>;
927 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
928 <&cpg CPG_MOD R9A07G044_USB_U2H0_HCLK>;
940 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
941 <&cpg CPG_MOD R9A07G044_USB_U2H1_HCLK>;
956 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
957 <&cpg CPG_MOD R9A07G044_USB_U2P_EXR_CPUCLK>;
971 clocks = <&cpg CPG_MOD R9A07G044_WDT0_PCLK>,
972 <&cpg CPG_MOD R9A07G044_WDT0_CLK>;
986 clocks = <&cpg CPG_MOD R9A07G044_WDT1_PCLK>,
987 <&cpg CPG_MOD R9A07G044_WDT1_CLK>;
1001 clocks = <&cpg CPG_MOD R9A07G044_WDT2_PCLK>,
1002 <&cpg CPG_MOD R9A07G044_WDT2_CLK>;
1017 clocks = <&cpg CPG_MOD R9A07G044_OSTM0_PCLK>;
1028 clocks = <&cpg CPG_MOD R9A07G044_OSTM1_PCLK>;
1039 clocks = <&cpg CPG_MOD R9A07G044_OSTM2_PCLK>;