Lines Matching refs:cpg
8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
81 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
92 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
149 clocks = <&cpg CPG_MOD 402>;
151 resets = <&cpg 402>;
165 clocks = <&cpg CPG_MOD 912>;
167 resets = <&cpg 912>;
180 clocks = <&cpg CPG_MOD 911>;
182 resets = <&cpg 911>;
195 clocks = <&cpg CPG_MOD 910>;
197 resets = <&cpg 910>;
210 clocks = <&cpg CPG_MOD 909>;
212 resets = <&cpg 909>;
225 clocks = <&cpg CPG_MOD 908>;
227 resets = <&cpg 908>;
240 clocks = <&cpg CPG_MOD 907>;
242 resets = <&cpg 907>;
255 clocks = <&cpg CPG_MOD 906>;
257 resets = <&cpg 906>;
271 clocks = <&cpg CPG_MOD 303>;
274 resets = <&cpg 303>;
290 clocks = <&cpg CPG_MOD 302>;
293 resets = <&cpg 302>;
309 clocks = <&cpg CPG_MOD 301>;
312 resets = <&cpg 301>;
328 clocks = <&cpg CPG_MOD 300>;
331 resets = <&cpg 300>;
335 cpg: clock-controller@e6150000 { label
336 compatible = "renesas,r8a774c0-cpg-mssr";
362 clocks = <&cpg CPG_MOD 522>;
364 resets = <&cpg 522>;
379 clocks = <&cpg CPG_MOD 407>;
381 resets = <&cpg 407>;
390 clocks = <&cpg CPG_MOD 125>;
393 resets = <&cpg 125>;
403 clocks = <&cpg CPG_MOD 124>;
406 resets = <&cpg 124>;
416 clocks = <&cpg CPG_MOD 123>;
419 resets = <&cpg 123>;
429 clocks = <&cpg CPG_MOD 122>;
432 resets = <&cpg 122>;
442 clocks = <&cpg CPG_MOD 121>;
445 resets = <&cpg 121>;
456 clocks = <&cpg CPG_MOD 931>;
458 resets = <&cpg 931>;
473 clocks = <&cpg CPG_MOD 930>;
475 resets = <&cpg 930>;
490 clocks = <&cpg CPG_MOD 929>;
492 resets = <&cpg 929>;
507 clocks = <&cpg CPG_MOD 928>;
509 resets = <&cpg 928>;
523 clocks = <&cpg CPG_MOD 927>;
525 resets = <&cpg 927>;
539 clocks = <&cpg CPG_MOD 919>;
541 resets = <&cpg 919>;
555 clocks = <&cpg CPG_MOD 918>;
557 resets = <&cpg 918>;
571 clocks = <&cpg CPG_MOD 1003>;
573 resets = <&cpg 1003>;
586 clocks = <&cpg CPG_MOD 926>;
588 resets = <&cpg 926>;
600 clocks = <&cpg CPG_MOD 520>,
601 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
608 resets = <&cpg 520>;
618 clocks = <&cpg CPG_MOD 519>,
619 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
626 resets = <&cpg 519>;
636 clocks = <&cpg CPG_MOD 518>,
637 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
644 resets = <&cpg 518>;
654 clocks = <&cpg CPG_MOD 517>,
655 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
661 resets = <&cpg 517>;
671 clocks = <&cpg CPG_MOD 516>,
672 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
678 resets = <&cpg 516>;
687 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
695 resets = <&cpg 704>, <&cpg 703>;
706 clocks = <&cpg CPG_MOD 330>;
708 resets = <&cpg 330>;
720 clocks = <&cpg CPG_MOD 331>;
722 resets = <&cpg 331>;
753 clocks = <&cpg CPG_MOD 219>;
756 resets = <&cpg 219>;
795 clocks = <&cpg CPG_MOD 218>;
798 resets = <&cpg 218>;
837 clocks = <&cpg CPG_MOD 217>;
840 resets = <&cpg 217>;
962 clocks = <&cpg CPG_MOD 812>;
965 resets = <&cpg 812>;
979 clocks = <&cpg CPG_MOD 916>,
980 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
983 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
986 resets = <&cpg 916>;
995 clocks = <&cpg CPG_MOD 915>,
996 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
999 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
1002 resets = <&cpg 915>;
1013 clocks = <&cpg CPG_MOD 914>,
1014 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
1017 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
1020 resets = <&cpg 914>;
1035 clocks = <&cpg CPG_MOD 523>;
1037 resets = <&cpg 523>;
1045 clocks = <&cpg CPG_MOD 523>;
1047 resets = <&cpg 523>;
1055 clocks = <&cpg CPG_MOD 523>;
1057 resets = <&cpg 523>;
1065 clocks = <&cpg CPG_MOD 523>;
1067 resets = <&cpg 523>;
1075 clocks = <&cpg CPG_MOD 523>;
1077 resets = <&cpg 523>;
1085 clocks = <&cpg CPG_MOD 523>;
1087 resets = <&cpg 523>;
1095 clocks = <&cpg CPG_MOD 523>;
1097 resets = <&cpg 523>;
1107 clocks = <&cpg CPG_MOD 207>,
1108 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1115 resets = <&cpg 207>;
1124 clocks = <&cpg CPG_MOD 206>,
1125 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1132 resets = <&cpg 206>;
1141 clocks = <&cpg CPG_MOD 310>,
1142 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1149 resets = <&cpg 310>;
1158 clocks = <&cpg CPG_MOD 204>,
1159 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1165 resets = <&cpg 204>;
1174 clocks = <&cpg CPG_MOD 203>,
1175 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1181 resets = <&cpg 203>;
1190 clocks = <&cpg CPG_MOD 202>,
1191 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1197 resets = <&cpg 202>;
1206 clocks = <&cpg CPG_MOD 211>;
1211 resets = <&cpg 211>;
1222 clocks = <&cpg CPG_MOD 210>;
1226 resets = <&cpg 210>;
1237 clocks = <&cpg CPG_MOD 209>;
1241 resets = <&cpg 209>;
1252 clocks = <&cpg CPG_MOD 208>;
1256 resets = <&cpg 208>;
1266 clocks = <&cpg CPG_MOD 807>;
1268 resets = <&cpg 807>;
1294 clocks = <&cpg CPG_MOD 806>;
1296 resets = <&cpg 806>;
1340 clocks = <&cpg CPG_MOD 1005>,
1341 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1342 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1343 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1344 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1345 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1346 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1347 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1348 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1349 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1350 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1351 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1352 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1353 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1356 <&cpg CPG_CORE R8A774C0_CLK_ZA2>;
1369 resets = <&cpg 1005>,
1370 <&cpg 1006>, <&cpg 1007>,
1371 <&cpg 1008>, <&cpg 1009>,
1372 <&cpg 1010>, <&cpg 1011>,
1373 <&cpg 1012>, <&cpg 1013>,
1374 <&cpg 1014>, <&cpg 1015>;
1551 clocks = <&cpg CPG_MOD 502>;
1554 resets = <&cpg 502>;
1572 clocks = <&cpg CPG_MOD 328>;
1574 resets = <&cpg 328>;
1583 clocks = <&cpg CPG_MOD 328>;
1585 resets = <&cpg 328>;
1593 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1597 resets = <&cpg 703>, <&cpg 704>;
1605 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1610 resets = <&cpg 703>, <&cpg 704>;
1619 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1621 resets = <&cpg 703>, <&cpg 704>;
1631 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774C0_CLK_SD0H>;
1635 resets = <&cpg 314>;
1644 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774C0_CLK_SD1H>;
1648 resets = <&cpg 313>;
1657 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774C0_CLK_SD3H>;
1661 resets = <&cpg 311>;
1673 clocks = <&cpg CPG_MOD 917>;
1675 resets = <&cpg 917>;
1692 clocks = <&cpg CPG_MOD 408>;
1695 resets = <&cpg 408>;
1718 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1721 resets = <&cpg 319>;
1737 clocks = <&cpg CPG_MOD 319>;
1739 resets = <&cpg 319>;
1748 clocks = <&cpg CPG_MOD 626>;
1750 resets = <&cpg 626>;
1758 clocks = <&cpg CPG_MOD 623>;
1760 resets = <&cpg 623>;
1768 clocks = <&cpg CPG_MOD 622>;
1770 resets = <&cpg 622>;
1778 clocks = <&cpg CPG_MOD 631>;
1780 resets = <&cpg 631>;
1787 clocks = <&cpg CPG_MOD 607>;
1789 resets = <&cpg 607>;
1796 clocks = <&cpg CPG_MOD 603>;
1798 resets = <&cpg 603>;
1805 clocks = <&cpg CPG_MOD 602>;
1807 resets = <&cpg 602>;
1814 clocks = <&cpg CPG_MOD 611>;
1816 resets = <&cpg 611>;
1824 clocks = <&cpg CPG_MOD 716>;
1826 resets = <&cpg 716>;
1860 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1862 resets = <&cpg 724>;
1895 clocks = <&cpg CPG_MOD 727>;
1897 resets = <&cpg 727>;
1922 clocks = <&cpg CPG_MOD 727>;
1924 resets = <&cpg 726>;