Lines Matching refs:assigned

191 				assigned-clocks = <&pcc3 IMX8ULP_CLK_WDOG3>;
192 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SOSC_DIV2>;
226 				assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C4>;
227 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
228 				assigned-clock-rates = <48000000>;
239 				assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C5>;
240 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
241 				assigned-clock-rates = <48000000>;
272 				assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI4>;
273 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
274 				assigned-clock-rates = <48000000>;
287 				assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI5>;
288 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
289 				assigned-clock-rates = <48000000>;
315 				assigned-clocks = <&pcc4 IMX8ULP_CLK_LPI2C6>;
316 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
317 				assigned-clock-rates = <48000000>;
328 				assigned-clocks = <&pcc4 IMX8ULP_CLK_LPI2C7>;
329 				assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
330 				assigned-clock-rates = <48000000>;