Lines Matching refs:erratum

388 	  erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
410 	  erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
413 	  Under certain conditions this erratum can cause a clean line eviction
432 	  erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
438 	  address, then this erratum might cause a clean cache line to be
455 	  erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
460 	  maintenance operation to the same address, then this erratum might
476 	  erratum 832075 on Cortex-A57 parts up to r1p2.
495 	  erratum 834220 on Cortex-A57 parts up to r1p2.
516 	  workaround erratum 1742098 on Cortex-A57 and Cortex-A72.
532 	  erratum 845719 on Cortex-A53 parts up to r0p4.
572 	  this erratum will continue to use the feature.
598 	  This option adds a workaround for ARM Cortex-A76 erratum 1165522.
611 	  This option adds work arounds for ARM Cortex-A57 erratum 1319537
612 	  and A72 erratum 1319367
624 	  This option adds a workaround for ARM Cortex-A55 erratum 1530923.
640 	  This option adds a workaround for ARM Cortex-A55 erratum #2441007.
657 	  This option adds a workaround for ARM Cortex-A76 erratum 1286807.
672 	  This option adds a workaround for Arm Cortex-A76 erratum 1463225.
680 	  Work around the erratum by triggering a dummy step exception
690 	  This option adds a workaround for ARM Neoverse-N1 erratum
706 	  This option adds a workaround for Arm Cortex-A77 erratum 1508412.
729 	  This options adds the workaround for ARM Cortex-A510 erratum ARM64_ERRATUM_2051678.
740 	  This option adds the workaround for ARM Cortex-A510 erratum 2077057.
743 	  erratum causes SPSR_EL1 to be copied to SPSR_EL2, which could allow
757 	  This option adds the workaround for ARM Cortex-A510 erratum 2658417.
772 	  This option adds the workaround for ARM Cortex-A710/X2 erratum 2119858.
790 	  This option adds the workaround for ARM Neoverse-N2 erratum 2139208.
810 	  Enable workaround for ARM Cortex-A710 erratum 2054223
825 	  Enable workaround for ARM Neoverse-N2 erratum 2067961
844 	  This option adds the workaround for ARM Neoverse-N2 erratum 2253138.
862 	  This option adds the workaround for ARM Cortex-A710/X2 erratum 2224489.
879 	  This option adds a workaround for ARM Cortex-A510 erratum #2441009.
896 	  This option adds the workaround for ARM Cortex-A510 erratum 2064142.
914 	  This option adds the workaround for ARM Cortex-A510 erratum 2038923.
937 	  This option adds the workaround for ARM Cortex-A510 erratum 1902691.
955 	  This option adds the workaround for ARM Cortex-A510 erratum 2457168.
968 	bool "Cavium erratum 22375, 24313"
976 	    erratum 22375: only alloc 8MB table size
977 	    erratum 24313: ignore memory access type
985 	bool "Cavium erratum 23144: ITS SYNC hang on dual socket system"
1001 	  It also suffers from erratum 38545 (also present on Marvell's
1008 	bool "Cavium erratum 27456: Broadcast TLBI instructions may cause icache corruption"
1019 	bool "Cavium erratum 30115: Guest may disable interrupts in host"
1030 	bool "Cavium ThunderX2 erratum 219: PRFM between TTBR change and ISB fails"
1047 	bool "Fujitsu-A64FX erratum E#010001: Undefined fault may occur wrongly"
1050 	  This option adds a workaround for Fujitsu-A64FX erratum E#010001.
1083 	  is unchanged. Work around the erratum by invalidating the walk cache