Lines Matching refs:c7
62 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
63 mcr p15, 0, ip, c7, c10, 4 @ drain WB
64 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
81 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
82 mcr p15, 0, r0, c7, c0, 4 @ wait for interrupt
92 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
114 mcr p15, 0, ip, c7, c14, 0 @ clean & invalidate all D cache
116 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
117 mcrne p15, 0, ip, c7, c10, 0 @ drain write buffer
138 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
139 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
141 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
142 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
147 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
177 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
178 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
182 mcr p15, 0, r0, c7, c10, 4 @ drain WB
197 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
202 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
203 mcr p15, 0, r0, c7, c10, 4 @ drain WB
221 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
223 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
225 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
229 mcr p15, 0, r0, c7, c10, 4 @ drain WB
244 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
248 mcr p15, 0, r0, c7, c10, 4 @ drain WB
262 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
266 mcr p15, 0, r0, c7, c10, 4 @ drain WB
300 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
304 mcr p15, 0, r0, c7, c10, 4 @ drain WB
317 mcr p15, 0, ip, c7, c14, 0 @ clean & invalidate all D cache
318 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
319 mcr p15, 0, ip, c7, c10, 4 @ drain WB
322 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
335 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
336 mcr p15, 0, r0, c7, c10, 4 @ drain WB
359 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB
360 mcr p15, 0, ip, c7, c10, 4 @ drain write (&fill) buffer
361 mcr p15, 0, ip, c7, c5, 4 @ flush prefetch buffer
362 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
378 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches
379 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
380 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs