Lines Matching refs:p15
47 mrc p15, 0, r0, c0, c0, 1 @ read cache type register
68 mcr p15, 1, r0, c15, c9, 0 @ clean L2
69 mcr p15, 0, r0, c7, c10, 4 @ drain WB
72 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
75 mcr p15, 0, r0, c1, c0, 0 @ disable caches
91 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
92 mcr p15, 0, ip, c7, c10, 4 @ drain WB
94 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
96 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
99 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
112 mcr p15, 0, r0, c7, c10, 4 @ Drain write buffer
113 mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt
123 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
149 2: mcr p15, 0, ip, c7, c14, 2 @ clean + invalidate D set/way
157 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
158 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
177 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
178 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
180 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
181 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
187 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
216 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
217 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
221 mcr p15, 0, r0, c7, c10, 4 @ drain WB
237 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
242 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
243 mcr p15, 0, r0, c7, c10, 4 @ drain WB
252 mcr p15, 5, r0, c15, c15, 0 @ D clean/inv range start
253 mcr p15, 5, r1, c15, c15, 1 @ D clean/inv range top
256 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
257 mcr p15, 0, r0, c7, c10, 4 @ drain WB
277 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
279 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
280 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
284 mcr p15, 0, r0, c7, c10, 4 @ drain WB
291 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
293 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
298 mcr p15, 5, r0, c15, c14, 0 @ D inv range start
299 mcr p15, 5, r1, c15, c14, 1 @ D inv range top
316 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
320 mcr p15, 0, r0, c7, c10, 4 @ drain WB
330 mcr p15, 5, r0, c15, c13, 0 @ D clean range start
331 mcr p15, 5, r1, c15, c13, 1 @ D clean range top
333 mcr p15, 0, r0, c7, c10, 4 @ drain WB
347 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
351 mcr p15, 0, r0, c7, c10, 4 @ drain WB
361 mcr p15, 5, r0, c15, c15, 0 @ D clean/inv range start
362 mcr p15, 5, r1, c15, c15, 1 @ D clean/inv range top
364 mcr p15, 0, r0, c7, c10, 4 @ drain WB
439 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
445 1: mcr p15, 1, r2, c15, c9, 1 @ clean L2 entry
450 mcr p15, 0, r0, c7, c10, 4 @ drain WB
475 mcreq p15, 0, ip, c7, c5, 0 @ invalidate I cache
476 mcreq p15, 0, ip, c7, c10, 4 @ drain WB
478 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
479 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
495 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
498 mcr p15, 1, r0, c15, c9, 1 @ clean L2 entry
500 mcr p15, 0, r0, c7, c10, 4 @ drain WB
510 mrc p15, 0, r4, c13, c0, 0 @ PID
511 mrc p15, 0, r5, c3, c0, 0 @ Domain ID
512 mrc p15, 0, r6, c1, c0, 0 @ Control register
519 mcr p15, 0, ip, c8, c7, 0 @ invalidate I+D TLBs
520 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches
522 mcr p15, 0, r4, c13, c0, 0 @ PID
523 mcr p15, 0, r5, c3, c0, 0 @ Domain ID
524 mcr p15, 0, r1, c2, c0, 0 @ TTB address
533 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
534 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
536 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
541 mrc p15, 0, r0, c1, c0 @ get control register v4