Lines Matching refs:p15
37 mrc p15, 0, r0, c1, c0, 0
40 mcr p15, 0, r0, c1, c0, 0 @ disable caches
51 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache
52 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register
54 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
62 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches
64 mcr p15, 0, r0, c6, c3 @ disable area 3~7
65 mcr p15, 0, r0, c6, c4
66 mcr p15, 0, r0, c6, c5
67 mcr p15, 0, r0, c6, c6
68 mcr p15, 0, r0, c6, c7
71 mcr p15, 0, r0, c6, c0 @ set area 0, default
81 mcr p15, 0, r0, c6, c1 @ set area 1, RAM
94 2: mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
97 mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable
103 mcr p15, 0, r0, c3, c0
107 mcr p15, 0, r0, c5, c0 @ all read/write access
109 mrc p15, 0, r0, c1, c0 @ get control register