Lines Matching refs:tmp1
81 .macro check_cpu_part_num part_num, tmp1, tmp2
82 mrc p15, 0, \tmp1, c0, c0, 0
83 ubfx \tmp1, \tmp1, #4, #12
85 cmp \tmp1, \tmp2
89 .macro exit_smp, tmp1, tmp2
90 mrc p15, 0, \tmp1, c1, c0, 1 @ ACTLR
91 bic \tmp1, \tmp1, #(1<<6) | (1<<0) @ clear ACTLR.SMP | ACTLR.FW
92 mcr p15, 0, \tmp1, c1, c0, 1 @ ACTLR
95 check_cpu_part_num 0xc09, \tmp1, \tmp2
96 mrceq p15, 0, \tmp1, c0, c0, 5
97 andeq \tmp1, \tmp1, #0xF
98 moveq \tmp1, \tmp1, lsl #2
100 moveq \tmp2, \tmp2, lsl \tmp1
101 ldreq \tmp1, =(TEGRA_ARM_PERIF_VIRT + 0xC)
102 streq \tmp2, [\tmp1] @ invalidate SCU tags for CPU
109 .macro tegra_get_soc_id base, tmp1
110 mov32 \tmp1, \base
111 ldr \tmp1, [\tmp1, #APB_MISC_GP_HIDREV]
112 and \tmp1, \tmp1, #0xff00
113 mov \tmp1, \tmp1, lsr #8