Lines Matching refs:AF10
177 pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
178 <STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
179 <STM32_PINMUX('C', 0, AF10)>, /* OTG_HS_ULPI_STP */
180 <STM32_PINMUX('A', 5, AF10)>, /* OTG_HS_ULPI_CK */
181 <STM32_PINMUX('A', 3, AF10)>, /* OTG_HS_ULPI_D0 */
182 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
183 <STM32_PINMUX('B', 1, AF10)>, /* OTG_HS_ULPI_D2 */
184 <STM32_PINMUX('B', 10, AF10)>, /* OTG_HS_ULPI_D3 */
185 <STM32_PINMUX('B', 11, AF10)>, /* OTG_HS_ULPI_D4 */
186 <STM32_PINMUX('B', 12, AF10)>, /* OTG_HS_ULPI_D5 */
187 <STM32_PINMUX('B', 13, AF10)>, /* OTG_HS_ULPI_D6 */
188 <STM32_PINMUX('B', 5, AF10)>; /* OTG_HS_ULPI_D7 */
197 pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
198 <STM32_PINMUX('C', 2, AF10)>, /* OTG_HS_ULPI_DIR */
199 <STM32_PINMUX('C', 0, AF10)>, /* OTG_HS_ULPI_STP */
200 <STM32_PINMUX('A', 5, AF10)>, /* OTG_HS_ULPI_CK */
201 <STM32_PINMUX('A', 3, AF10)>, /* OTG_HS_ULPI_D0 */
202 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
203 <STM32_PINMUX('B', 1, AF10)>, /* OTG_HS_ULPI_D2 */
204 <STM32_PINMUX('B', 10, AF10)>, /* OTG_HS_ULPI_D3 */
205 <STM32_PINMUX('B', 11, AF10)>, /* OTG_HS_ULPI_D4 */
206 <STM32_PINMUX('B', 12, AF10)>, /* OTG_HS_ULPI_D5 */
207 <STM32_PINMUX('B', 13, AF10)>, /* OTG_HS_ULPI_D6 */
208 <STM32_PINMUX('B', 5, AF10)>; /* OTG_HS_ULPI_D7 */
217 pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */
218 <STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
219 <STM32_PINMUX('A', 12, AF10)>; /* OTG_FS_DP */
261 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2 D2 */
262 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2 D3 */
274 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2 D2 */
275 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2 D3 */