Lines Matching refs:cpg
8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
54 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
65 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
115 clocks = <&cpg CPG_MOD 402>;
117 resets = <&cpg 402>;
131 clocks = <&cpg CPG_MOD 912>;
133 resets = <&cpg 912>;
146 clocks = <&cpg CPG_MOD 911>;
148 resets = <&cpg 911>;
161 clocks = <&cpg CPG_MOD 910>;
163 resets = <&cpg 910>;
176 clocks = <&cpg CPG_MOD 909>;
178 resets = <&cpg 909>;
191 clocks = <&cpg CPG_MOD 908>;
193 resets = <&cpg 908>;
206 clocks = <&cpg CPG_MOD 907>;
208 resets = <&cpg 907>;
221 clocks = <&cpg CPG_MOD 905>;
223 resets = <&cpg 905>;
236 clocks = <&cpg CPG_MOD 904>;
238 resets = <&cpg 904>;
251 clocks = <&cpg CPG_MOD 921>;
253 resets = <&cpg 921>;
266 clocks = <&cpg CPG_MOD 919>;
268 resets = <&cpg 919>;
281 clocks = <&cpg CPG_MOD 914>;
283 resets = <&cpg 914>;
296 clocks = <&cpg CPG_MOD 913>;
298 resets = <&cpg 913>;
306 cpg: clock-controller@e6150000 { label
307 compatible = "renesas,r8a7792-cpg-mssr";
342 clocks = <&cpg CPG_MOD 407>;
344 resets = <&cpg 407>;
374 clocks = <&cpg CPG_MOD 931>;
376 resets = <&cpg 931>;
388 clocks = <&cpg CPG_MOD 930>;
390 resets = <&cpg 930>;
402 clocks = <&cpg CPG_MOD 929>;
404 resets = <&cpg 929>;
416 clocks = <&cpg CPG_MOD 928>;
418 resets = <&cpg 928>;
430 clocks = <&cpg CPG_MOD 927>;
432 resets = <&cpg 927>;
444 clocks = <&cpg CPG_MOD 925>;
446 resets = <&cpg 925>;
461 clocks = <&cpg CPG_MOD 926>;
466 resets = <&cpg 926>;
495 clocks = <&cpg CPG_MOD 219>;
498 resets = <&cpg 219>;
528 clocks = <&cpg CPG_MOD 218>;
531 resets = <&cpg 218>;
541 clocks = <&cpg CPG_MOD 812>;
544 resets = <&cpg 812>;
554 clocks = <&cpg CPG_MOD 917>;
559 resets = <&cpg 917>;
571 clocks = <&cpg CPG_MOD 721>,
572 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
578 resets = <&cpg 721>;
587 clocks = <&cpg CPG_MOD 720>,
588 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
594 resets = <&cpg 720>;
603 clocks = <&cpg CPG_MOD 719>,
604 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
610 resets = <&cpg 719>;
619 clocks = <&cpg CPG_MOD 718>,
620 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
626 resets = <&cpg 718>;
635 clocks = <&cpg CPG_MOD 717>,
636 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
642 resets = <&cpg 717>;
651 clocks = <&cpg CPG_MOD 716>,
652 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
658 resets = <&cpg 716>;
667 clocks = <&cpg CPG_MOD 000>;
672 resets = <&cpg 000>;
683 clocks = <&cpg CPG_MOD 208>;
688 resets = <&cpg 208>;
699 clocks = <&cpg CPG_MOD 916>,
700 <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
703 resets = <&cpg 916>;
712 clocks = <&cpg CPG_MOD 915>,
713 <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
716 resets = <&cpg 915>;
725 clocks = <&cpg CPG_MOD 811>;
727 resets = <&cpg 811>;
736 clocks = <&cpg CPG_MOD 810>;
738 resets = <&cpg 810>;
747 clocks = <&cpg CPG_MOD 809>;
749 resets = <&cpg 809>;
758 clocks = <&cpg CPG_MOD 808>;
760 resets = <&cpg 808>;
769 clocks = <&cpg CPG_MOD 805>;
771 resets = <&cpg 805>;
780 clocks = <&cpg CPG_MOD 804>;
782 resets = <&cpg 804>;
794 clocks = <&cpg CPG_MOD 314>;
796 resets = <&cpg 314>;
810 clocks = <&cpg CPG_MOD 408>;
813 resets = <&cpg 408>;
820 clocks = <&cpg CPG_MOD 131>;
822 resets = <&cpg 131>;
829 clocks = <&cpg CPG_MOD 128>;
831 resets = <&cpg 128>;
838 clocks = <&cpg CPG_MOD 127>;
840 resets = <&cpg 127>;
848 clocks = <&cpg CPG_MOD 106>;
850 resets = <&cpg 106>;
858 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
860 resets = <&cpg 724>;
892 clocks = <&cpg CPG_MOD 124>;
895 resets = <&cpg 124>;
912 clocks = <&cpg CPG_MOD 329>;
915 resets = <&cpg 329>;