Lines Matching refs:cpg
10 #include <dt-bindings/clock/r8a77470-cpg-mssr.h>
34 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
45 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
95 clocks = <&cpg CPG_MOD 402>;
97 resets = <&cpg 402>;
111 clocks = <&cpg CPG_MOD 912>;
113 resets = <&cpg 912>;
126 clocks = <&cpg CPG_MOD 911>;
128 resets = <&cpg 911>;
141 clocks = <&cpg CPG_MOD 910>;
143 resets = <&cpg 910>;
157 clocks = <&cpg CPG_MOD 909>;
159 resets = <&cpg 909>;
172 clocks = <&cpg CPG_MOD 908>;
174 resets = <&cpg 908>;
187 clocks = <&cpg CPG_MOD 907>;
189 resets = <&cpg 907>;
197 cpg: clock-controller@e6150000 { label
198 compatible = "renesas,r8a77470-cpg-mssr";
239 clocks = <&cpg CPG_MOD 407>;
241 resets = <&cpg 407>;
280 clocks = <&cpg CPG_MOD 931>;
282 resets = <&cpg 931>;
294 clocks = <&cpg CPG_MOD 930>;
296 resets = <&cpg 930>;
308 clocks = <&cpg CPG_MOD 929>;
310 resets = <&cpg 929>;
322 clocks = <&cpg CPG_MOD 928>;
324 resets = <&cpg 928>;
336 clocks = <&cpg CPG_MOD 927>;
338 resets = <&cpg 927>;
348 clocks = <&cpg CPG_MOD 704>;
356 resets = <&cpg 704>;
366 clocks = <&cpg CPG_MOD 704>;
369 resets = <&cpg 704>;
383 clocks = <&cpg CPG_MOD 706>;
392 resets = <&cpg 706>;
402 clocks = <&cpg CPG_MOD 706>;
405 resets = <&cpg 706>;
421 clocks = <&cpg CPG_MOD 330>;
423 resets = <&cpg 330>;
435 clocks = <&cpg CPG_MOD 331>;
437 resets = <&cpg 331>;
449 clocks = <&cpg CPG_MOD 326>;
451 resets = <&cpg 326>;
463 clocks = <&cpg CPG_MOD 327>;
465 resets = <&cpg 327>;
495 clocks = <&cpg CPG_MOD 219>;
498 resets = <&cpg 219>;
528 clocks = <&cpg CPG_MOD 218>;
531 resets = <&cpg 218>;
541 clocks = <&cpg CPG_MOD 812>;
544 resets = <&cpg 812>;
554 clocks = <&cpg CPG_MOD 918>;
562 resets = <&cpg 918>;
570 clocks = <&cpg CPG_MOD 917>;
578 resets = <&cpg 917>;
587 clocks = <&cpg CPG_MOD 721>,
588 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
594 resets = <&cpg 721>;
603 clocks = <&cpg CPG_MOD 720>,
604 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
610 resets = <&cpg 720>;
619 clocks = <&cpg CPG_MOD 719>,
620 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
626 resets = <&cpg 719>;
635 clocks = <&cpg CPG_MOD 718>,
636 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
642 resets = <&cpg 718>;
651 clocks = <&cpg CPG_MOD 715>,
652 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
658 resets = <&cpg 715>;
667 clocks = <&cpg CPG_MOD 714>,
668 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
674 resets = <&cpg 714>;
683 clocks = <&cpg CPG_MOD 717>,
684 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
690 resets = <&cpg 717>;
699 clocks = <&cpg CPG_MOD 716>,
700 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
706 resets = <&cpg 716>;
715 clocks = <&cpg CPG_MOD 713>,
716 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
722 resets = <&cpg 713>;
729 clocks = <&cpg CPG_MOD 523>;
731 resets = <&cpg 523>;
739 clocks = <&cpg CPG_MOD 523>;
741 resets = <&cpg 523>;
749 clocks = <&cpg CPG_MOD 523>;
751 resets = <&cpg 523>;
759 clocks = <&cpg CPG_MOD 523>;
761 resets = <&cpg 523>;
769 clocks = <&cpg CPG_MOD 523>;
771 resets = <&cpg 523>;
779 clocks = <&cpg CPG_MOD 523>;
781 resets = <&cpg 523>;
789 clocks = <&cpg CPG_MOD 523>;
791 resets = <&cpg 523>;
801 clocks = <&cpg CPG_MOD 811>;
803 resets = <&cpg 811>;
812 clocks = <&cpg CPG_MOD 810>;
814 resets = <&cpg 810>;
822 clocks = <&cpg CPG_MOD 703>;
826 resets = <&cpg 703>;
834 clocks = <&cpg CPG_MOD 703>;
839 resets = <&cpg 703>;
846 clocks = <&cpg CPG_MOD 703>;
848 resets = <&cpg 703>;
857 clocks = <&cpg CPG_MOD 705>;
861 resets = <&cpg 705>;
869 clocks = <&cpg CPG_MOD 705>;
874 resets = <&cpg 705>;
881 clocks = <&cpg CPG_MOD 705>;
883 resets = <&cpg 705>;
893 clocks = <&cpg CPG_MOD 314>;
899 resets = <&cpg 314>;
907 clocks = <&cpg CPG_MOD 313>;
910 resets = <&cpg 313>;
919 clocks = <&cpg CPG_MOD 312>;
925 resets = <&cpg 312>;
937 clocks = <&cpg CPG_MOD 408>;
940 resets = <&cpg 408>;
948 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
950 resets = <&cpg 724>;
987 clocks = <&cpg CPG_MOD 124>;
990 resets = <&cpg 124>;
1006 clocks = <&cpg CPG_MOD 329>;
1009 resets = <&cpg 329>;