Lines Matching refs:cpg
8 #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
56 clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
78 clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
100 clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
122 clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
144 clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
154 clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
164 clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
174 clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
248 clocks = <&cpg CPG_MOD 402>;
250 resets = <&cpg 402>;
264 clocks = <&cpg CPG_MOD 912>;
266 resets = <&cpg 912>;
279 clocks = <&cpg CPG_MOD 911>;
281 resets = <&cpg 911>;
294 clocks = <&cpg CPG_MOD 910>;
296 resets = <&cpg 910>;
309 clocks = <&cpg CPG_MOD 909>;
311 resets = <&cpg 909>;
324 clocks = <&cpg CPG_MOD 908>;
326 resets = <&cpg 908>;
339 clocks = <&cpg CPG_MOD 907>;
341 resets = <&cpg 907>;
353 clocks = <&cpg CPG_MOD 304>;
355 resets = <&cpg 304>;
360 cpg: clock-controller@e6150000 { label
361 compatible = "renesas,r8a7742-cpg-mssr";
402 clocks = <&cpg CPG_MOD 407>;
404 resets = <&cpg 407>;
412 clocks = <&cpg CPG_MOD 522>;
414 resets = <&cpg 522>;
502 clocks = <&cpg CPG_MOD 931>;
504 resets = <&cpg 931>;
516 clocks = <&cpg CPG_MOD 930>;
518 resets = <&cpg 930>;
530 clocks = <&cpg CPG_MOD 929>;
532 resets = <&cpg 929>;
544 clocks = <&cpg CPG_MOD 928>;
546 resets = <&cpg 928>;
559 clocks = <&cpg CPG_MOD 318>;
564 resets = <&cpg 318>;
576 clocks = <&cpg CPG_MOD 323>;
581 resets = <&cpg 323>;
593 clocks = <&cpg CPG_MOD 300>;
598 resets = <&cpg 300>;
610 clocks = <&cpg CPG_MOD 926>;
615 resets = <&cpg 926>;
624 clocks = <&cpg CPG_MOD 704>;
629 resets = <&cpg 704>;
642 clocks = <&cpg CPG_MOD 704>;
645 resets = <&cpg 704>;
665 clocks = <&cpg CPG_MOD 330>;
667 resets = <&cpg 330>;
679 clocks = <&cpg CPG_MOD 331>;
681 resets = <&cpg 331>;
711 clocks = <&cpg CPG_MOD 219>;
714 resets = <&cpg 219>;
744 clocks = <&cpg CPG_MOD 218>;
747 resets = <&cpg 218>;
757 clocks = <&cpg CPG_MOD 812>;
760 resets = <&cpg 812>;
770 clocks = <&cpg CPG_MOD 917>;
775 resets = <&cpg 917>;
787 clocks = <&cpg CPG_MOD 204>;
793 resets = <&cpg 204>;
802 clocks = <&cpg CPG_MOD 203>;
808 resets = <&cpg 203>;
817 clocks = <&cpg CPG_MOD 202>;
823 resets = <&cpg 202>;
832 clocks = <&cpg CPG_MOD 206>;
838 resets = <&cpg 206>;
847 clocks = <&cpg CPG_MOD 207>;
853 resets = <&cpg 207>;
862 clocks = <&cpg CPG_MOD 216>;
868 resets = <&cpg 216>;
877 clocks = <&cpg CPG_MOD 721>,
878 <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
884 resets = <&cpg 721>;
893 clocks = <&cpg CPG_MOD 720>,
894 <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
900 resets = <&cpg 720>;
909 clocks = <&cpg CPG_MOD 310>,
910 <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
916 resets = <&cpg 310>;
925 clocks = <&cpg CPG_MOD 717>,
926 <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
932 resets = <&cpg 717>;
941 clocks = <&cpg CPG_MOD 716>,
942 <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
948 resets = <&cpg 716>;
957 clocks = <&cpg CPG_MOD 0>;
962 resets = <&cpg 0>;
973 clocks = <&cpg CPG_MOD 208>;
978 resets = <&cpg 208>;
989 clocks = <&cpg CPG_MOD 205>;
994 resets = <&cpg 205>;
1005 clocks = <&cpg CPG_MOD 215>;
1010 resets = <&cpg 215>;
1021 clocks = <&cpg CPG_MOD 916>,
1022 <&cpg CPG_CORE R8A7742_CLK_RCAN>, <&can_clk>;
1025 resets = <&cpg 916>;
1034 clocks = <&cpg CPG_MOD 915>,
1035 <&cpg CPG_CORE R8A7742_CLK_RCAN>, <&can_clk>;
1038 resets = <&cpg 915>;
1045 clocks = <&cpg CPG_MOD 523>;
1047 resets = <&cpg 523>;
1055 clocks = <&cpg CPG_MOD 523>;
1057 resets = <&cpg 523>;
1065 clocks = <&cpg CPG_MOD 523>;
1067 resets = <&cpg 523>;
1075 clocks = <&cpg CPG_MOD 523>;
1077 resets = <&cpg 523>;
1085 clocks = <&cpg CPG_MOD 523>;
1087 resets = <&cpg 523>;
1095 clocks = <&cpg CPG_MOD 523>;
1097 resets = <&cpg 523>;
1105 clocks = <&cpg CPG_MOD 523>;
1107 resets = <&cpg 523>;
1117 clocks = <&cpg CPG_MOD 811>;
1119 resets = <&cpg 811>;
1128 clocks = <&cpg CPG_MOD 810>;
1130 resets = <&cpg 810>;
1139 clocks = <&cpg CPG_MOD 809>;
1141 resets = <&cpg 809>;
1150 clocks = <&cpg CPG_MOD 808>;
1152 resets = <&cpg 808>;
1172 clocks = <&cpg CPG_MOD 1005>,
1173 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1174 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1175 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1176 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1177 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1178 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1179 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1180 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1181 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1182 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1183 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1184 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1185 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1187 <&cpg CPG_CORE R8A7742_CLK_M2>;
1200 resets = <&cpg 1005>,
1201 <&cpg 1006>, <&cpg 1007>,
1202 <&cpg 1008>, <&cpg 1009>,
1203 <&cpg 1010>, <&cpg 1011>,
1204 <&cpg 1012>, <&cpg 1013>,
1205 <&cpg 1014>, <&cpg 1015>;
1380 clocks = <&cpg CPG_MOD 502>;
1383 resets = <&cpg 502>;
1411 clocks = <&cpg CPG_MOD 501>;
1414 resets = <&cpg 501>;
1424 clocks = <&cpg CPG_MOD 328>;
1426 resets = <&cpg 328>;
1439 clocks = <&cpg CPG_MOD 703>;
1441 resets = <&cpg 703>;
1474 clocks = <&cpg CPG_MOD 703>;
1476 resets = <&cpg 703>;
1494 clocks = <&cpg CPG_MOD 703>;
1496 resets = <&cpg 703>;
1530 clocks = <&cpg CPG_MOD 314>;
1536 resets = <&cpg 314>;
1545 clocks = <&cpg CPG_MOD 313>;
1551 resets = <&cpg 313>;
1560 clocks = <&cpg CPG_MOD 312>;
1566 resets = <&cpg 312>;
1575 clocks = <&cpg CPG_MOD 311>;
1581 resets = <&cpg 311>;
1590 clocks = <&cpg CPG_MOD 315>;
1595 resets = <&cpg 315>;
1606 clocks = <&cpg CPG_MOD 305>;
1611 resets = <&cpg 305>;
1622 clocks = <&cpg CPG_MOD 815>;
1624 resets = <&cpg 815>;
1633 clocks = <&cpg CPG_MOD 814>;
1635 resets = <&cpg 814>;
1644 clocks = <&cpg CPG_MOD 813>;
1646 resets = <&cpg 813>;
1661 clocks = <&cpg CPG_MOD 408>;
1664 resets = <&cpg 408>;
1688 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1691 resets = <&cpg 319>;
1699 clocks = <&cpg CPG_MOD 130>;
1701 resets = <&cpg 130>;
1708 clocks = <&cpg CPG_MOD 131>;
1710 resets = <&cpg 131>;
1717 clocks = <&cpg CPG_MOD 128>;
1719 resets = <&cpg 128>;
1726 clocks = <&cpg CPG_MOD 127>;
1728 resets = <&cpg 127>;
1737 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1738 <&cpg CPG_MOD 722>;
1740 resets = <&cpg 724>;
1771 clocks = <&cpg CPG_MOD 726>;
1773 resets = <&cpg 726>;
1797 clocks = <&cpg CPG_MOD 725>;
1799 resets = <&cpg 725>;
1831 clocks = <&cpg CPG_MOD 124>;
1834 resets = <&cpg 124>;
1850 clocks = <&cpg CPG_MOD 329>;
1853 resets = <&cpg 329>;