Lines Matching refs:syscon
62 clocks = <&syscon ASPEED_CLK_AHB>;
93 clocks = <&syscon ASPEED_CLK_AHB>;
116 clocks = <&syscon ASPEED_CLK_AHB>;
153 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
161 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
169 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
179 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
190 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
202 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
223 syscon: syscon@1e6e2000 { label
224 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
269 clocks = <&syscon ASPEED_CLK_GATE_YCLK>;
270 resets = <&syscon ASPEED_RESET_HACE>;
274 compatible = "aspeed,ast2500-gfx", "syscon";
277 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
278 resets = <&syscon ASPEED_RESET_CRT1>;
279 syscon = <&syscon>;
287 clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
288 resets = <&syscon ASPEED_RESET_XDMA>;
291 aspeed,scu = <&syscon>;
298 clocks = <&syscon ASPEED_CLK_APB>;
299 resets = <&syscon ASPEED_RESET_ADC>;
307 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
308 <&syscon ASPEED_CLK_GATE_ECLK>;
325 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
333 clocks = <&syscon ASPEED_CLK_SDIO>;
342 clocks = <&syscon ASPEED_CLK_SDIO>;
354 clocks = <&syscon ASPEED_CLK_APB>;
365 clocks = <&syscon ASPEED_CLK_APB>;
384 clocks = <&syscon ASPEED_CLK_APB>;
393 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
404 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
412 clocks = <&syscon ASPEED_CLK_APB>;
418 clocks = <&syscon ASPEED_CLK_APB>;
424 clocks = <&syscon ASPEED_CLK_APB>;
433 clocks = <&syscon ASPEED_CLK_24M>;
434 resets = <&syscon ASPEED_RESET_PWM>;
443 clocks = <&syscon ASPEED_CLK_APB>;
449 compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon";
461 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
469 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
477 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
485 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
492 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
500 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
526 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
535 clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
536 resets = <&syscon ASPEED_RESET_PECI>;
547 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
558 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
569 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
601 clocks = <&syscon ASPEED_CLK_APB>;
602 resets = <&syscon ASPEED_RESET_I2C>;
617 clocks = <&syscon ASPEED_CLK_APB>;
618 resets = <&syscon ASPEED_RESET_I2C>;
633 clocks = <&syscon ASPEED_CLK_APB>;
634 resets = <&syscon ASPEED_RESET_I2C>;
650 clocks = <&syscon ASPEED_CLK_APB>;
651 resets = <&syscon ASPEED_RESET_I2C>;
667 clocks = <&syscon ASPEED_CLK_APB>;
668 resets = <&syscon ASPEED_RESET_I2C>;
684 clocks = <&syscon ASPEED_CLK_APB>;
685 resets = <&syscon ASPEED_RESET_I2C>;
701 clocks = <&syscon ASPEED_CLK_APB>;
702 resets = <&syscon ASPEED_RESET_I2C>;
718 clocks = <&syscon ASPEED_CLK_APB>;
719 resets = <&syscon ASPEED_RESET_I2C>;
735 clocks = <&syscon ASPEED_CLK_APB>;
736 resets = <&syscon ASPEED_RESET_I2C>;
752 clocks = <&syscon ASPEED_CLK_APB>;
753 resets = <&syscon ASPEED_RESET_I2C>;
769 clocks = <&syscon ASPEED_CLK_APB>;
770 resets = <&syscon ASPEED_RESET_I2C>;
786 clocks = <&syscon ASPEED_CLK_APB>;
787 resets = <&syscon ASPEED_RESET_I2C>;
803 clocks = <&syscon ASPEED_CLK_APB>;
804 resets = <&syscon ASPEED_RESET_I2C>;
820 clocks = <&syscon ASPEED_CLK_APB>;
821 resets = <&syscon ASPEED_RESET_I2C>;