Lines Matching refs:PTP

379 a HW PTP clock source, to allow time conversion in userspace and
380 optionally synchronize system time with a userspace PTP stack such
381 as linuxptp. For the PTP clock API, see Documentation/driver-api/ptp.rst.
538 	    /* PTP v1, UDP, any kind of event packet */
594 3.2 Special considerations for stacked PTP Hardware Clocks
597 There are situations when there may be more than one PHC (PTP Hardware Clock)
614 When a DSA switch is attached to a host port, PTP synchronization has to
616 jitter between the host port and its PTP partner. For this reason, some DSA
625 By design, PTP timestamping with a DSA switch does not need any special
627 host port also supports PTP timestamping, DSA will take care of intercepting
633 In the generic layer, DSA provides the following infrastructure for PTP
645   PTP TX timestamp register (or sometimes a FIFO) where the timestamp
647   key-value pairs of PTP sequence ID/message type/domain number and the
651   the PTP transport type, and ``ptp_parse_header`` to interpret the PTP
656   no follow-up message required by the PTP protocol (because the
662   identify PTP event messages (any other packets, including PTP general
678 switches do. However, PHYs may be able to detect and timestamp PTP packets, for
682 A PHY driver that supports PTP timestamping must create a ``struct
736 trigger before the existence of stacked PTP clocks.  One example has to do with
749 1. "TX": checks whether PTP timestamping has been previously enabled through
770 that PTP timestamping is not enabled for anything other than the outermost PHC,