Lines Matching refs:dfl
97 (/sys/class/fpga_region/regionX/dfl-fme.n/):
169 (/sys/class/fpga_region/<regionX>/<dfl-port.m>/):
213 (Please refer to drivers/fpga/dfl.c for detailed enumeration APIs).
364 (e.g. "dfl-port.n" or "dfl-fme.m" is found), then it's the base
369 /sys/class/fpga_region/region0/dfl-fme.0
370 /sys/class/fpga_region/region0/dfl-port.0
371 /sys/class/fpga_region/region0/dfl-port.1
374 /sys/class/fpga_region/region3/dfl-fme.1
375 /sys/class/fpga_region/region3/dfl-port.2
376 /sys/class/fpga_region/region3/dfl-port.3
381 /sys/class/fpga_region/<regionX>/<dfl-fme.n>/
382 /sys/class/fpga_region/<regionX>/<dfl-port.m>/
389 /sys/class/fpga_region/<regionX>/<dfl-fme.n>/dev
390 /sys/class/fpga_region/<regionX>/<dfl-port.n>/dev
502 FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c)
507 https://github.com/OPAE/dfl-feature-id