Lines Matching refs:description
30 description: The phandle of the mediatek apmixedsys controller
34 description: The phandle of the mediatek infracfg controller
38 description: The phandle of the mediatek topckgen controller
42 - description: audio infra sys clock
43 - description: audio infra 26M clock
44 - description: audio top mux
45 - description: audio intbus mux
46 - description: mainpll 136.5M clock
47 - description: faud1 mux
48 - description: apll1 clock
49 - description: faud2 mux
50 - description: apll2 clock
51 - description: audio engen1 mux
52 - description: apll1_d8 22.5792M clock
53 - description: audio engen2 mux
54 - description: apll2_d8 24.576M clock
55 - description: i2s0 mclk mux
56 - description: i2s1 mclk mux
57 - description: i2s2 mclk mux
58 - description: i2s4 mclk mux
59 - description: tdm mclk mux
60 - description: i2s0_mck divider
61 - description: i2s1_mck divider
62 - description: i2s2_mck divider
63 - description: i2s4_mck divider
64 - description: tdm_mck divider
65 - description: audio hires mux
66 - description: 26M clock