Lines Matching refs:GPIO

1 Specifying GPIO information for devices
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
14 GPIO properties can contain one or more GPIO phandles, but only in exceptional
23 The following example could be used to describe GPIO pins used as device enable
38 a local offset to the GPIO line and the second cell represent consumer flags,
57 GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller.
83 1.1) GPIO specifier best practices
86 A gpio-specifier should contain a flag indicating the GPIO polarity; active-
91 GPIO controller that achieves (or represents, for inputs) a logically asserted
94 the GPIO controller and the device, then the gpio-specifier will represent the
121 (at the GPIO controller) assuming that the device is configured for this
124 responsible for correctly interpreting (inverting) the GPIO signal at the GPIO
130 Every GPIO controller node must contain both an empty "gpio-controller"
134 Some system-on-chips (SoCs) use the concept of GPIO banks. A GPIO bank is an
141 Optionally, a GPIO controller may have a "ngpios" property. This property
155 Optionally, a GPIO controller may have a "gpio-line-names" property. This is
156 an array of strings defining the names of the GPIO lines going out of the
157 GPIO controller. This name should be the most meaningful producer name
163 is not a good name to give to a GPIO line. Placeholders are discouraged:
164 rather use the "" (blank string) if the use of the GPIO line is undefined
185 The GPIO chip may contain GPIO hog definitions. GPIO hogging is a mechanism
186 providing automatic GPIO request and configuration as part of the
189 Each GPIO hog definition is represented as a child node of the GPIO controller.
191 - gpio-hog:   A property specifying that this child node represents a GPIO hog.
192 - gpios:      Store the GPIO information (id, flags, ...) for each GPIO to
194 	      specified in its parent node (GPIO controller node).
199 - input:      A property specifying to set the GPIO direction as input.
200 - output-low  A property specifying to set the GPIO direction as output with
202 - output-high A property specifying to set the GPIO direction as output with
206 - line-name:  The GPIO label name. If not present the node name is used.
208 Example of two SOC GPIO banks defined as gpio-controller nodes:
234 Some or all of the GPIOs provided by a GPIO controller may be routed to pins
236 GPIO and other functions. It is a fairly common practice among silicon
239 2.2) Ordinary (numerical) GPIO ranges
245 to pins in the GPIO controller local number space.
247 The format is: <[pin controller phandle], [GPIO controller offset],
250 The GPIO controller offset pertains to the GPIO controller node containing the
257 ranges with just one pin-to-GPIO line mapping if the ranges are concocted, but
265 - pins 20..29 on pin controller "foo" is mapped to GPIO line 0..9 and
266 - pins 50..69 on pin controller "bar" is mapped to GPIO line 10..29
279 Here, a single GPIO controller has GPIOs 0..9 routed to pin controller
284 2.3) GPIO ranges from named pin groups
297 defined in the respective pin controller. The number of pins/GPIO lines in the
321 Here, three GPIO ranges are defined referring to two pin controllers.
323 pinctrl1 GPIO ranges are defined using pin numbers whereas the GPIO ranges