29 struct dma_chan *catpt_dma_request_config_chan(struct catpt_dev *cdev)  in catpt_dma_request_config_chan()  argument
39 	chan = dma_request_channel(mask, catpt_dma_filter, cdev->dev);  in catpt_dma_request_config_chan()
41 		dev_err(cdev->dev, "request channel failed\n");  in catpt_dma_request_config_chan()
54 		dev_err(cdev->dev, "slave config failed: %d\n", ret);  in catpt_dma_request_config_chan()
62 static int catpt_dma_memcpy(struct catpt_dev *cdev, struct dma_chan *chan,  in catpt_dma_memcpy()  argument
73 		dev_err(cdev->dev, "prep dma memcpy failed\n");  in catpt_dma_memcpy()
78 	catpt_updatel_shim(cdev, HMDC,  in catpt_dma_memcpy()
84 		dev_err(cdev->dev, "submit tx failed: %d\n", ret);  in catpt_dma_memcpy()
93 	catpt_updatel_shim(cdev, HMDC,  in catpt_dma_memcpy()
99 int catpt_dma_memcpy_todsp(struct catpt_dev *cdev, struct dma_chan *chan,  in catpt_dma_memcpy_todsp()  argument
103 	return catpt_dma_memcpy(cdev, chan, dst_addr | CATPT_DMA_DSP_ADDR_MASK,  in catpt_dma_memcpy_todsp()
107 int catpt_dma_memcpy_fromdsp(struct catpt_dev *cdev, struct dma_chan *chan,  in catpt_dma_memcpy_fromdsp()  argument
111 	return catpt_dma_memcpy(cdev, chan, dst_addr,  in catpt_dma_memcpy_fromdsp()
115 int catpt_dmac_probe(struct catpt_dev *cdev)  in catpt_dmac_probe()  argument
120 	dmac = devm_kzalloc(cdev->dev, sizeof(*dmac), GFP_KERNEL);  in catpt_dmac_probe()
124 	dmac->regs = cdev->lpe_ba + cdev->spec->host_dma_offset[CATPT_DMA_DEVID];  in catpt_dmac_probe()
125 	dmac->dev = cdev->dev;  in catpt_dmac_probe()
126 	dmac->irq = cdev->irq;  in catpt_dmac_probe()
128 	ret = dma_coerce_mask_and_coherent(cdev->dev, DMA_BIT_MASK(31));  in catpt_dmac_probe()
139 	cdev->dmac = dmac;  in catpt_dmac_probe()
143 void catpt_dmac_remove(struct catpt_dev *cdev)  in catpt_dmac_remove()  argument
151 	dw_dma_remove(cdev->dmac);  in catpt_dmac_remove()
154 static void catpt_dsp_set_srampge(struct catpt_dev *cdev, struct resource *sram,  in catpt_dsp_set_srampge()  argument
161 	old = catpt_readl_pci(cdev, VDRTCTL0) & mask;  in catpt_dsp_set_srampge()
162 	dev_dbg(cdev->dev, "SRAMPGE [0x%08lx] 0x%08lx -> 0x%08lx",  in catpt_dsp_set_srampge()
168 	catpt_updatel_pci(cdev, VDRTCTL0, mask, new);  in catpt_dsp_set_srampge()
181 			dev_dbg(cdev->dev, "sanitize block %ld: off 0x%08x\n",  in catpt_dsp_set_srampge()
183 			memcpy_fromio(buf, cdev->lpe_ba + off, sizeof(buf));  in catpt_dsp_set_srampge()
189 void catpt_dsp_update_srampge(struct catpt_dev *cdev, struct resource *sram,  in catpt_dsp_update_srampge()  argument
208 	catpt_updatel_pci(cdev, VDRTCTL2, CATPT_VDRTCTL2_DCLCGE, 0);  in catpt_dsp_update_srampge()
210 	catpt_dsp_set_srampge(cdev, sram, mask, new);  in catpt_dsp_update_srampge()
213 	catpt_updatel_pci(cdev, VDRTCTL2, CATPT_VDRTCTL2_DCLCGE,  in catpt_dsp_update_srampge()
217 int catpt_dsp_stall(struct catpt_dev *cdev, bool stall)  in catpt_dsp_stall()  argument
222 	catpt_updatel_shim(cdev, CS1, CATPT_CS_STALL, val);  in catpt_dsp_stall()
224 	return catpt_readl_poll_shim(cdev, CS1,  in catpt_dsp_stall()
229 static int catpt_dsp_reset(struct catpt_dev *cdev, bool reset)  in catpt_dsp_reset()  argument
234 	catpt_updatel_shim(cdev, CS1, CATPT_CS_RST, val);  in catpt_dsp_reset()
236 	return catpt_readl_poll_shim(cdev, CS1,  in catpt_dsp_reset()
241 void lpt_dsp_pll_shutdown(struct catpt_dev *cdev, bool enable)  in lpt_dsp_pll_shutdown()  argument
246 	catpt_updatel_pci(cdev, VDRTCTL0, LPT_VDRTCTL0_APLLSE, val);  in lpt_dsp_pll_shutdown()
249 void wpt_dsp_pll_shutdown(struct catpt_dev *cdev, bool enable)  in wpt_dsp_pll_shutdown()  argument
254 	catpt_updatel_pci(cdev, VDRTCTL2, WPT_VDRTCTL2_APLLSE, val);  in wpt_dsp_pll_shutdown()
257 static int catpt_dsp_select_lpclock(struct catpt_dev *cdev, bool lp, bool waiti)  in catpt_dsp_select_lpclock()  argument
262 	mutex_lock(&cdev->clk_mutex);  in catpt_dsp_select_lpclock()
265 	reg = catpt_readl_shim(cdev, CS1) & CATPT_CS_LPCS;  in catpt_dsp_select_lpclock()
266 	dev_dbg(cdev->dev, "LPCS [0x%08lx] 0x%08x -> 0x%08x",  in catpt_dsp_select_lpclock()
270 		mutex_unlock(&cdev->clk_mutex);  in catpt_dsp_select_lpclock()
276 		ret = catpt_readl_poll_shim(cdev, ISD,  in catpt_dsp_select_lpclock()
280 			dev_warn(cdev->dev, "await WAITI timeout\n");  in catpt_dsp_select_lpclock()
283 				mutex_unlock(&cdev->clk_mutex);  in catpt_dsp_select_lpclock()
289 	ret = catpt_readl_poll_shim(cdev, CLKCTL,  in catpt_dsp_select_lpclock()
293 		dev_warn(cdev->dev, "clock change still in progress\n");  in catpt_dsp_select_lpclock()
298 	catpt_updatel_shim(cdev, CS1, mask, val);  in catpt_dsp_select_lpclock()
300 	ret = catpt_readl_poll_shim(cdev, CLKCTL,  in catpt_dsp_select_lpclock()
304 		dev_warn(cdev->dev, "clock change still in progress\n");  in catpt_dsp_select_lpclock()
307 	cdev->spec->pll_shutdown(cdev, lp);  in catpt_dsp_select_lpclock()
309 	mutex_unlock(&cdev->clk_mutex);  in catpt_dsp_select_lpclock()
313 int catpt_dsp_update_lpclock(struct catpt_dev *cdev)  in catpt_dsp_update_lpclock()  argument
317 	list_for_each_entry(stream, &cdev->stream_list, node)  in catpt_dsp_update_lpclock()
319 			return catpt_dsp_select_lpclock(cdev, false, true);  in catpt_dsp_update_lpclock()
321 	return catpt_dsp_select_lpclock(cdev, true, true);  in catpt_dsp_update_lpclock()
325 static void catpt_dsp_set_regs_defaults(struct catpt_dev *cdev)  in catpt_dsp_set_regs_defaults()  argument
329 	catpt_writel_shim(cdev, CS1, CATPT_CS_DEFAULT);  in catpt_dsp_set_regs_defaults()
330 	catpt_writel_shim(cdev, ISC, CATPT_ISC_DEFAULT);  in catpt_dsp_set_regs_defaults()
331 	catpt_writel_shim(cdev, ISD, CATPT_ISD_DEFAULT);  in catpt_dsp_set_regs_defaults()
332 	catpt_writel_shim(cdev, IMC, CATPT_IMC_DEFAULT);  in catpt_dsp_set_regs_defaults()
333 	catpt_writel_shim(cdev, IMD, CATPT_IMD_DEFAULT);  in catpt_dsp_set_regs_defaults()
334 	catpt_writel_shim(cdev, IPCC, CATPT_IPCC_DEFAULT);  in catpt_dsp_set_regs_defaults()
335 	catpt_writel_shim(cdev, IPCD, CATPT_IPCD_DEFAULT);  in catpt_dsp_set_regs_defaults()
336 	catpt_writel_shim(cdev, CLKCTL, CATPT_CLKCTL_DEFAULT);  in catpt_dsp_set_regs_defaults()
337 	catpt_writel_shim(cdev, CS2, CATPT_CS2_DEFAULT);  in catpt_dsp_set_regs_defaults()
338 	catpt_writel_shim(cdev, LTRC, CATPT_LTRC_DEFAULT);  in catpt_dsp_set_regs_defaults()
339 	catpt_writel_shim(cdev, HMDC, CATPT_HMDC_DEFAULT);  in catpt_dsp_set_regs_defaults()
342 		catpt_writel_ssp(cdev, i, SSCR0, CATPT_SSC0_DEFAULT);  in catpt_dsp_set_regs_defaults()
343 		catpt_writel_ssp(cdev, i, SSCR1, CATPT_SSC1_DEFAULT);  in catpt_dsp_set_regs_defaults()
344 		catpt_writel_ssp(cdev, i, SSSR, CATPT_SSS_DEFAULT);  in catpt_dsp_set_regs_defaults()
345 		catpt_writel_ssp(cdev, i, SSITR, CATPT_SSIT_DEFAULT);  in catpt_dsp_set_regs_defaults()
346 		catpt_writel_ssp(cdev, i, SSDR, CATPT_SSD_DEFAULT);  in catpt_dsp_set_regs_defaults()
347 		catpt_writel_ssp(cdev, i, SSTO, CATPT_SSTO_DEFAULT);  in catpt_dsp_set_regs_defaults()
348 		catpt_writel_ssp(cdev, i, SSPSP, CATPT_SSPSP_DEFAULT);  in catpt_dsp_set_regs_defaults()
349 		catpt_writel_ssp(cdev, i, SSTSA, CATPT_SSTSA_DEFAULT);  in catpt_dsp_set_regs_defaults()
350 		catpt_writel_ssp(cdev, i, SSRSA, CATPT_SSRSA_DEFAULT);  in catpt_dsp_set_regs_defaults()
351 		catpt_writel_ssp(cdev, i, SSTSS, CATPT_SSTSS_DEFAULT);  in catpt_dsp_set_regs_defaults()
352 		catpt_writel_ssp(cdev, i, SSCR2, CATPT_SSCR2_DEFAULT);  in catpt_dsp_set_regs_defaults()
353 		catpt_writel_ssp(cdev, i, SSPSP2, CATPT_SSPSP2_DEFAULT);  in catpt_dsp_set_regs_defaults()
357 int catpt_dsp_power_down(struct catpt_dev *cdev)  in catpt_dsp_power_down()  argument
362 	catpt_updatel_pci(cdev, VDRTCTL2, CATPT_VDRTCTL2_DCLCGE, 0);  in catpt_dsp_power_down()
364 	catpt_dsp_reset(cdev, true);  in catpt_dsp_power_down()
366 	catpt_updatel_shim(cdev, CS1, CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1),  in catpt_dsp_power_down()
368 	catpt_dsp_select_lpclock(cdev, true, false);  in catpt_dsp_power_down()
370 	catpt_updatel_shim(cdev, CLKCTL, CATPT_CLKCTL_SMOS, 0);  in catpt_dsp_power_down()
372 	catpt_dsp_set_regs_defaults(cdev);  in catpt_dsp_power_down()
377 	catpt_updatel_pci(cdev, VDRTCTL2, mask, val);  in catpt_dsp_power_down()
379 	catpt_updatel_pci(cdev, VDRTCTL2, CATPT_VDRTCTL2_DTCGE,  in catpt_dsp_power_down()
383 	catpt_dsp_set_srampge(cdev, &cdev->dram, cdev->spec->dram_mask,  in catpt_dsp_power_down()
384 			      cdev->spec->dram_mask);  in catpt_dsp_power_down()
385 	catpt_dsp_set_srampge(cdev, &cdev->iram, cdev->spec->iram_mask,  in catpt_dsp_power_down()
386 			      cdev->spec->iram_mask);  in catpt_dsp_power_down()
387 	mask = cdev->spec->d3srampgd_bit | cdev->spec->d3pgd_bit;  in catpt_dsp_power_down()
388 	catpt_updatel_pci(cdev, VDRTCTL0, mask, cdev->spec->d3pgd_bit);  in catpt_dsp_power_down()
390 	catpt_updatel_pci(cdev, PMCS, PCI_PM_CTRL_STATE_MASK, PCI_D3hot);  in catpt_dsp_power_down()
395 	catpt_updatel_pci(cdev, VDRTCTL2, CATPT_VDRTCTL2_DCLCGE,  in catpt_dsp_power_down()
402 int catpt_dsp_power_up(struct catpt_dev *cdev)  in catpt_dsp_power_up()  argument
407 	catpt_updatel_pci(cdev, VDRTCTL2, CATPT_VDRTCTL2_DCLCGE, 0);  in catpt_dsp_power_up()
412 	catpt_updatel_pci(cdev, VDRTCTL2, mask, val);  in catpt_dsp_power_up()
414 	catpt_updatel_pci(cdev, PMCS, PCI_PM_CTRL_STATE_MASK, PCI_D0);  in catpt_dsp_power_up()
417 	mask = cdev->spec->d3srampgd_bit | cdev->spec->d3pgd_bit;  in catpt_dsp_power_up()
418 	catpt_updatel_pci(cdev, VDRTCTL0, mask, mask);  in catpt_dsp_power_up()
419 	catpt_dsp_set_srampge(cdev, &cdev->dram, cdev->spec->dram_mask, 0);  in catpt_dsp_power_up()
420 	catpt_dsp_set_srampge(cdev, &cdev->iram, cdev->spec->iram_mask, 0);  in catpt_dsp_power_up()
422 	catpt_dsp_set_regs_defaults(cdev);  in catpt_dsp_power_up()
425 	catpt_updatel_shim(cdev, CLKCTL, CATPT_CLKCTL_SMOS, CATPT_CLKCTL_SMOS);  in catpt_dsp_power_up()
426 	catpt_dsp_select_lpclock(cdev, false, false);  in catpt_dsp_power_up()
428 	catpt_updatel_shim(cdev, CS1, CATPT_CS_SBCS(0) | CATPT_CS_SBCS(1),  in catpt_dsp_power_up()
430 	catpt_dsp_reset(cdev, false);  in catpt_dsp_power_up()
433 	catpt_updatel_pci(cdev, VDRTCTL2, CATPT_VDRTCTL2_DCLCGE,  in catpt_dsp_power_up()
437 	catpt_updatel_shim(cdev, IMC, CATPT_IMC_IPCDB | CATPT_IMC_IPCCD, 0);  in catpt_dsp_power_up()
456 int catpt_coredump(struct catpt_dev *cdev)  in catpt_coredump()  argument
468 	dump_size = resource_size(&cdev->dram);  in catpt_coredump()
469 	dump_size += resource_size(&cdev->iram);  in catpt_coredump()
482 	hdr->core_id = cdev->spec->core_id;  in catpt_coredump()
487 	info = cdev->ipc.config.fw_info;  in catpt_coredump()
503 	hdr->core_id = cdev->spec->core_id;  in catpt_coredump()
505 	hdr->size = resource_size(&cdev->iram);  in catpt_coredump()
508 	memcpy_fromio(pos, cdev->lpe_ba + cdev->iram.start, hdr->size);  in catpt_coredump()
513 	hdr->core_id = cdev->spec->core_id;  in catpt_coredump()
515 	hdr->size = resource_size(&cdev->dram);  in catpt_coredump()
518 	memcpy_fromio(pos, cdev->lpe_ba + cdev->dram.start, hdr->size);  in catpt_coredump()
523 	hdr->core_id = cdev->spec->core_id;  in catpt_coredump()
528 	memcpy_fromio(pos, catpt_shim_addr(cdev), CATPT_SHIM_REGS_SIZE);  in catpt_coredump()
532 		memcpy_fromio(pos, catpt_ssp_addr(cdev, i),  in catpt_coredump()
537 		memcpy_fromio(pos, catpt_dma_addr(cdev, i),  in catpt_coredump()
542 	dev_coredumpv(cdev->dev, dump, dump_size, GFP_KERNEL);  in catpt_coredump()