Lines Matching refs:TX
57 #define TX 1 macro
407 int dir = tx ? TX : RX; in fsl_ssi_config_enable()
427 srcr = vals[RX].srcr | vals[TX].srcr; in fsl_ssi_config_enable()
428 stcr = vals[RX].stcr | vals[TX].stcr; in fsl_ssi_config_enable()
429 sier = vals[RX].sier | vals[TX].sier; in fsl_ssi_config_enable()
511 int adir = tx ? RX : TX; in fsl_ssi_config_disable()
512 int dir = tx ? TX : RX; in fsl_ssi_config_disable()
593 vals[TX].sier = SSI_SIER_TFE0_EN | FSLSSI_SIER_DBG_TX_FLAGS; in fsl_ssi_setup_regvals()
594 vals[TX].stcr = SSI_STCR_TFEN0; in fsl_ssi_setup_regvals()
595 vals[TX].scr = SSI_SCR_SSIEN | SSI_SCR_TE; in fsl_ssi_setup_regvals()
599 vals[RX].scr = vals[TX].scr = 0; in fsl_ssi_setup_regvals()
603 vals[TX].stcr |= SSI_STCR_TFEN1; in fsl_ssi_setup_regvals()
608 vals[TX].sier |= SSI_SIER_TDMAE; in fsl_ssi_setup_regvals()
611 vals[TX].sier |= SSI_SIER_TIE; in fsl_ssi_setup_regvals()
870 vals[TX].stcr &= ~SSI_STCR_TFEN1; in fsl_ssi_hw_params()
872 vals[TX].scr &= ~SSI_SCR_TCH_EN; in fsl_ssi_hw_params()
877 vals[TX].stcr |= SSI_STCR_TFEN1; in fsl_ssi_hw_params()
879 vals[TX].scr |= SSI_SCR_TCH_EN; in fsl_ssi_hw_params()