Lines Matching refs:ice
109 static int phase22_init(struct snd_ice1712 *ice) in phase22_init() argument
115 switch (ice->eeprom.subvendor) { in phase22_init()
118 ice->num_total_dacs = 2; in phase22_init()
119 ice->num_total_adcs = 2; in phase22_init()
120 ice->vt1720 = 1; /* Envy24HT-S have 16 bit wide GPIO */ in phase22_init()
128 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); in phase22_init()
129 ak = ice->akm; in phase22_init()
132 ice->akm_codecs = 1; in phase22_init()
133 switch (ice->eeprom.subvendor) { in phase22_init()
137 &akm_phase22_priv, ice); in phase22_init()
146 static int phase22_add_controls(struct snd_ice1712 *ice) in phase22_add_controls() argument
150 switch (ice->eeprom.subvendor) { in phase22_add_controls()
153 err = snd_ice1712_akm4xxx_build_controls(ice); in phase22_add_controls()
197 static void phase28_spi_write(struct snd_ice1712 *ice, unsigned int cs, in phase28_spi_write() argument
203 tmp = snd_ice1712_gpio_read(ice); in phase28_spi_write()
205 snd_ice1712_gpio_set_mask(ice, ~(PHASE28_WM_RW|PHASE28_SPI_MOSI| in phase28_spi_write()
209 snd_ice1712_gpio_write(ice, tmp); in phase28_spi_write()
214 snd_ice1712_gpio_write(ice, tmp); in phase28_spi_write()
220 snd_ice1712_gpio_write(ice, tmp); in phase28_spi_write()
223 snd_ice1712_gpio_write(ice, tmp); in phase28_spi_write()
229 snd_ice1712_gpio_write(ice, tmp); in phase28_spi_write()
232 snd_ice1712_gpio_write(ice, tmp); in phase28_spi_write()
239 static unsigned short wm_get(struct snd_ice1712 *ice, int reg) in wm_get() argument
242 return ((unsigned short)ice->akm[0].images[reg] << 8) | in wm_get()
243 ice->akm[0].images[reg + 1]; in wm_get()
249 static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val) in wm_put_nocache() argument
251 phase28_spi_write(ice, PHASE28_WM_CS, (reg << 9) | (val & 0x1ff), 16); in wm_put_nocache()
257 static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val) in wm_put() argument
259 wm_put_nocache(ice, reg, val); in wm_put()
261 ice->akm[0].images[reg] = val >> 8; in wm_put()
262 ice->akm[0].images[reg + 1] = val; in wm_put()
265 static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, in wm_set_vol() argument
276 wm_put(ice, index, nvol); in wm_set_vol()
277 wm_put_nocache(ice, index, 0x180 | nvol); in wm_set_vol()
288 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_pcm_mute_get() local
290 mutex_lock(&ice->gpio_mutex); in wm_pcm_mute_get()
291 ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ? in wm_pcm_mute_get()
293 mutex_unlock(&ice->gpio_mutex); in wm_pcm_mute_get()
300 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_pcm_mute_put() local
304 snd_ice1712_save_gpio_status(ice); in wm_pcm_mute_put()
305 oval = wm_get(ice, WM_MUTE); in wm_pcm_mute_put()
309 wm_put(ice, WM_MUTE, nval); in wm_pcm_mute_put()
310 snd_ice1712_restore_gpio_status(ice); in wm_pcm_mute_put()
331 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_master_vol_get() local
332 struct phase28_spec *spec = ice->spec; in wm_master_vol_get()
343 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_master_vol_put() local
344 struct phase28_spec *spec = ice->spec; in wm_master_vol_put()
347 snd_ice1712_save_gpio_status(ice); in wm_master_vol_put()
356 for (dac = 0; dac < ice->num_total_dacs; dac += 2) in wm_master_vol_put()
357 wm_set_vol(ice, WM_DAC_ATTEN + dac + ch, in wm_master_vol_put()
363 snd_ice1712_restore_gpio_status(ice); in wm_master_vol_put()
367 static int phase28_init(struct snd_ice1712 *ice) in phase28_init() argument
412 ice->num_total_dacs = 8; in phase28_init()
413 ice->num_total_adcs = 2; in phase28_init()
418 ice->spec = spec; in phase28_init()
421 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); in phase28_init()
422 ak = ice->akm; in phase28_init()
425 ice->akm_codecs = 1; in phase28_init()
427 snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for time being */ in phase28_init()
430 snd_ice1712_save_gpio_status(ice); in phase28_init()
431 snd_ice1712_gpio_set_mask(ice, ~(PHASE28_WM_RESET|PHASE28_WM_CS| in phase28_init()
434 tmp = snd_ice1712_gpio_read(ice); in phase28_init()
436 snd_ice1712_gpio_write(ice, tmp); in phase28_init()
439 snd_ice1712_gpio_write(ice, tmp); in phase28_init()
442 snd_ice1712_gpio_write(ice, tmp); in phase28_init()
447 wm_put(ice, p[0], p[1]); in phase28_init()
449 snd_ice1712_restore_gpio_status(ice); in phase28_init()
453 for (i = 0; i < ice->num_total_dacs; i++) { in phase28_init()
455 wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]); in phase28_init()
478 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_vol_get() local
479 struct phase28_spec *spec = ice->spec; in wm_vol_get()
493 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_vol_put() local
494 struct phase28_spec *spec = ice->spec; in wm_vol_put()
500 snd_ice1712_save_gpio_status(ice); in wm_vol_put()
510 wm_set_vol(ice, idx, spec->vol[ofs+i], in wm_vol_put()
515 snd_ice1712_restore_gpio_status(ice); in wm_vol_put()
534 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_mute_get() local
535 struct phase28_spec *spec = ice->spec; in wm_mute_get()
550 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_mute_put() local
551 struct phase28_spec *spec = ice->spec; in wm_mute_put()
557 snd_ice1712_save_gpio_status(ice); in wm_mute_put()
565 wm_set_vol(ice, ofs + i, spec->vol[ofs + i], in wm_mute_put()
570 snd_ice1712_restore_gpio_status(ice); in wm_mute_put()
583 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_master_mute_get() local
584 struct phase28_spec *spec = ice->spec; in wm_master_mute_get()
596 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_master_mute_put() local
597 struct phase28_spec *spec = ice->spec; in wm_master_mute_put()
600 snd_ice1712_save_gpio_status(ice); in wm_master_mute_put()
609 for (dac = 0; dac < ice->num_total_dacs; dac += 2) in wm_master_mute_put()
610 wm_set_vol(ice, WM_DAC_ATTEN + dac + i, in wm_master_mute_put()
616 snd_ice1712_restore_gpio_status(ice); in wm_master_mute_put()
638 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_pcm_vol_get() local
641 mutex_lock(&ice->gpio_mutex); in wm_pcm_vol_get()
642 val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff; in wm_pcm_vol_get()
645 mutex_unlock(&ice->gpio_mutex); in wm_pcm_vol_get()
652 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in wm_pcm_vol_put() local
659 snd_ice1712_save_gpio_status(ice); in wm_pcm_vol_put()
661 ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff; in wm_pcm_vol_put()
663 wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */ in wm_pcm_vol_put()
665 wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100); in wm_pcm_vol_put()
668 snd_ice1712_restore_gpio_status(ice); in wm_pcm_vol_put()
680 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in phase28_deemp_get() local
681 ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) == in phase28_deemp_get()
689 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in phase28_deemp_put() local
691 temp = wm_get(ice, WM_DAC_CTRL2); in phase28_deemp_put()
698 wm_put(ice, WM_DAC_CTRL2, temp); in phase28_deemp_put()
718 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in phase28_oversampling_get() local
719 ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) == in phase28_oversampling_get()
728 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); in phase28_oversampling_put() local
730 temp = wm_get(ice, WM_MASTER); in phase28_oversampling_put()
739 wm_put(ice, WM_MASTER, temp); in phase28_oversampling_put()
897 static int phase28_add_controls(struct snd_ice1712 *ice) in phase28_add_controls() argument
904 err = snd_ctl_add(ice->card, in phase28_add_controls()
906 ice)); in phase28_add_controls()
912 err = snd_ctl_add(ice->card, in phase28_add_controls()
913 snd_ctl_new1(&wm_controls[i], ice)); in phase28_add_controls()