Lines Matching refs:vconfig

93 	u8 *vconfig;  member
106 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_VENDOR_ID], in mdpy_create_config_space()
108 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_DEVICE_ID], in mdpy_create_config_space()
110 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_SUBSYSTEM_VENDOR_ID], in mdpy_create_config_space()
112 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_SUBSYSTEM_ID], in mdpy_create_config_space()
115 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_COMMAND], in mdpy_create_config_space()
117 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_STATUS], in mdpy_create_config_space()
119 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_CLASS_DEVICE], in mdpy_create_config_space()
121 mdev_state->vconfig[PCI_CLASS_REVISION] = 0x01; in mdpy_create_config_space()
123 STORE_LE32((u32 *) &mdev_state->vconfig[PCI_BASE_ADDRESS_0], in mdpy_create_config_space()
130 mdev_state->vconfig[PCI_CAPABILITY_LIST] = MDPY_VENDORCAP_OFFSET; in mdpy_create_config_space()
131 mdev_state->vconfig[MDPY_VENDORCAP_OFFSET + 0] = 0x09; /* vendor cap */ in mdpy_create_config_space()
132 mdev_state->vconfig[MDPY_VENDORCAP_OFFSET + 1] = 0x00; /* next ptr */ in mdpy_create_config_space()
133 mdev_state->vconfig[MDPY_VENDORCAP_OFFSET + 2] = MDPY_VENDORCAP_SIZE; in mdpy_create_config_space()
134 STORE_LE32((u32 *) &mdev_state->vconfig[MDPY_FORMAT_OFFSET], in mdpy_create_config_space()
136 STORE_LE32((u32 *) &mdev_state->vconfig[MDPY_WIDTH_OFFSET], in mdpy_create_config_space()
138 STORE_LE32((u32 *) &mdev_state->vconfig[MDPY_HEIGHT_OFFSET], in mdpy_create_config_space()
160 cfg_addr |= (mdev_state->vconfig[offset] & in handle_pci_cfg_write()
162 STORE_LE32(&mdev_state->vconfig[offset], cfg_addr); in handle_pci_cfg_write()
178 memcpy(buf, (mdev_state->vconfig + pos), count); in mdev_access()
236 mdev_state->vconfig = kzalloc(MDPY_CONFIG_SPACE_SIZE, GFP_KERNEL); in mdpy_probe()
237 if (mdev_state->vconfig == NULL) { in mdpy_probe()
269 kfree(mdev_state->vconfig); in mdpy_probe()
284 kfree(mdev_state->vconfig); in mdpy_remove()