Lines Matching refs:BIT
236 #define BD71815_BUCK_PWM_FIXED BIT(4)
237 #define BD71815_BUCK_SNVS_ON BIT(3)
238 #define BD71815_BUCK_RUN_ON BIT(2)
239 #define BD71815_BUCK_LPSR_ON BIT(1)
240 #define BD71815_BUCK_SUSP_ON BIT(0)
243 #define BD71815_BUCK_DVSSEL BIT(7)
244 #define BD71815_BUCK_STBY_DVS BIT(6)
257 #define LED_CHGDONE_EN BIT(4)
258 #define LED_RUN_ON BIT(2)
259 #define LED_LPSR_ON BIT(1)
260 #define LED_SUSP_ON BIT(0)
263 #define LDO1_EN BIT(0)
264 #define LDO2_EN BIT(1)
265 #define LDO3_EN BIT(2)
266 #define DVREF_EN BIT(3)
267 #define VOSNVS_SW_EN BIT(4)
270 #define LDO1_SNVS_ON BIT(7)
271 #define LDO1_RUN_ON BIT(6)
272 #define LDO1_LPSR_ON BIT(5)
273 #define LDO1_SUSP_ON BIT(4)
275 #define LDO4_MODE_MASK BIT(3)
276 #define LDO4_MODE_I2C BIT(3)
279 #define LDO3_MODE_MASK BIT(2)
280 #define LDO3_MODE_I2C BIT(2)
284 #define LDO3_SNVS_ON BIT(7)
285 #define LDO3_RUN_ON BIT(6)
286 #define LDO3_LPSR_ON BIT(5)
287 #define LDO3_SUSP_ON BIT(4)
288 #define LDO2_SNVS_ON BIT(3)
289 #define LDO2_RUN_ON BIT(2)
290 #define LDO2_LPSR_ON BIT(1)
291 #define LDO2_SUSP_ON BIT(0)
295 #define LDO5_SNVS_ON BIT(7)
296 #define LDO5_RUN_ON BIT(6)
297 #define LDO5_LPSR_ON BIT(5)
298 #define LDO5_SUSP_ON BIT(4)
299 #define LDO4_SNVS_ON BIT(3)
300 #define LDO4_RUN_ON BIT(2)
301 #define LDO4_LPSR_ON BIT(1)
302 #define LDO4_SUSP_ON BIT(0)
305 #define DVREF_SNVS_ON BIT(7)
306 #define DVREF_RUN_ON BIT(6)
307 #define DVREF_LPSR_ON BIT(5)
308 #define DVREF_SUSP_ON BIT(4)
309 #define LDO_LPSR_SNVS_ON BIT(3)
310 #define LDO_LPSR_RUN_ON BIT(2)
311 #define LDO_LPSR_LPSR_ON BIT(1)
312 #define LDO_LPSR_SUSP_ON BIT(0)
315 #define OUT32K_EN BIT(0)
316 #define OUT32K_MODE BIT(1)
317 #define OUT32K_MODE_CMOS BIT(1)
321 #define BAT_DET BIT(5)
323 #define BAT_DET_DONE BIT(4)
324 #define VBAT_OV BIT(3)
325 #define DBAT_DET BIT(0)
328 #define VBUS_DET BIT(0)
334 #define A0_ONESEC BIT(7)
337 #define ALMALE BIT(0)
340 #define DCIN_MON_DET BIT(1)
341 #define DCIN_MON_RES BIT(0)
342 #define POWERON_LONG BIT(2)
343 #define POWERON_MID BIT(3)
344 #define POWERON_SHORT BIT(4)
345 #define POWERON_PRESS BIT(5)
348 #define VBAT_MON_DET BIT(1)
349 #define VBAT_MON_RES BIT(0)
352 #define INT_STAT_11_VF_DET BIT(7)
353 #define INT_STAT_11_VF_RES BIT(6)
354 #define INT_STAT_11_VF125_DET BIT(5)
355 #define INT_STAT_11_VF125_RES BIT(4)
356 #define INT_STAT_11_OVTMP_DET BIT(3)
357 #define INT_STAT_11_OVTMP_RES BIT(2)
358 #define INT_STAT_11_LOTMP_DET BIT(1)
359 #define INT_STAT_11_LOTMP_RES BIT(0)
361 #define VBAT_MON_DET BIT(1)
362 #define VBAT_MON_RES BIT(0)
365 #define RESTARTEN BIT(0)
368 #define READY_FORCE_LOW BIT(2)
369 #define BD71815_GPIO_DRIVE_MASK BIT(4)
371 #define BD71815_GPIO_CMOS BIT(4)
467 #define BD71815_INT_BUCK1_OCP_MASK BIT(0)
468 #define BD71815_INT_BUCK2_OCP_MASK BIT(1)
469 #define BD71815_INT_BUCK3_OCP_MASK BIT(2)
470 #define BD71815_INT_BUCK4_OCP_MASK BIT(3)
471 #define BD71815_INT_BUCK5_OCP_MASK BIT(4)
472 #define BD71815_INT_LED_OVP_MASK BIT(5)
473 #define BD71815_INT_LED_OCP_MASK BIT(6)
474 #define BD71815_INT_LED_SCP_MASK BIT(7)
476 #define BD71815_INT_DCIN_RMV_MASK BIT(1)
477 #define BD71815_INT_CLPS_OUT_MASK BIT(2)
478 #define BD71815_INT_CLPS_IN_MASK BIT(3)
479 #define BD71815_INT_DCIN_OVP_RES_MASK BIT(4)
480 #define BD71815_INT_DCIN_OVP_DET_MASK BIT(5)
482 #define BD71815_INT_DCIN_MON_RES_MASK BIT(0)
483 #define BD71815_INT_DCIN_MON_DET_MASK BIT(1)
484 #define BD71815_INT_WDOG_MASK BIT(6)
486 #define BD71815_INT_VSYS_UV_RES_MASK BIT(0)
487 #define BD71815_INT_VSYS_UV_DET_MASK BIT(1)
488 #define BD71815_INT_VSYS_LOW_RES_MASK BIT(2)
489 #define BD71815_INT_VSYS_LOW_DET_MASK BIT(3)
490 #define BD71815_INT_VSYS_MON_RES_MASK BIT(6)
491 #define BD71815_INT_VSYS_MON_DET_MASK BIT(7)
493 #define BD71815_INT_CHG_WDG_TEMP_MASK BIT(2)
494 #define BD71815_INT_CHG_WDG_TIME_MASK BIT(3)
495 #define BD71815_INT_CHG_RECHARGE_RES_MASK BIT(4)
496 #define BD71815_INT_CHG_RECHARGE_DET_MASK BIT(5)
497 #define BD71815_INT_CHG_RANGED_TEMP_TRANSITION_MASK BIT(6)
498 #define BD71815_INT_CHG_STATE_TRANSITION_MASK BIT(7)
500 #define BD71815_INT_BAT_TEMP_NORMAL_MASK BIT(0)
501 #define BD71815_INT_BAT_TEMP_ERANGE_MASK BIT(1)
502 #define BD71815_INT_BAT_REMOVED_MASK BIT(4)
503 #define BD71815_INT_BAT_DETECTED_MASK BIT(5)
504 #define BD71815_INT_THERM_REMOVED_MASK BIT(6)
505 #define BD71815_INT_THERM_DETECTED_MASK BIT(7)
507 #define BD71815_INT_BAT_DEAD_MASK BIT(1)
508 #define BD71815_INT_BAT_SHORTC_RES_MASK BIT(2)
509 #define BD71815_INT_BAT_SHORTC_DET_MASK BIT(3)
510 #define BD71815_INT_BAT_LOW_VOLT_RES_MASK BIT(4)
511 #define BD71815_INT_BAT_LOW_VOLT_DET_MASK BIT(5)
512 #define BD71815_INT_BAT_OVER_VOLT_RES_MASK BIT(6)
513 #define BD71815_INT_BAT_OVER_VOLT_DET_MASK BIT(7)
515 #define BD71815_INT_BAT_MON_RES_MASK BIT(0)
516 #define BD71815_INT_BAT_MON_DET_MASK BIT(1)
518 #define BD71815_INT_BAT_CC_MON1_MASK BIT(0)
519 #define BD71815_INT_BAT_CC_MON2_MASK BIT(1)
520 #define BD71815_INT_BAT_CC_MON3_MASK BIT(2)
522 #define BD71815_INT_BAT_OVER_CURR_1_RES_MASK BIT(0)
523 #define BD71815_INT_BAT_OVER_CURR_1_DET_MASK BIT(1)
524 #define BD71815_INT_BAT_OVER_CURR_2_RES_MASK BIT(2)
525 #define BD71815_INT_BAT_OVER_CURR_2_DET_MASK BIT(3)
526 #define BD71815_INT_BAT_OVER_CURR_3_RES_MASK BIT(4)
527 #define BD71815_INT_BAT_OVER_CURR_3_DET_MASK BIT(5)
529 #define BD71815_INT_TEMP_BAT_LOW_RES_MASK BIT(0)
530 #define BD71815_INT_TEMP_BAT_LOW_DET_MASK BIT(1)
531 #define BD71815_INT_TEMP_BAT_HI_RES_MASK BIT(2)
532 #define BD71815_INT_TEMP_BAT_HI_DET_MASK BIT(3)
533 #define BD71815_INT_TEMP_CHIP_OVER_125_RES_MASK BIT(4)
534 #define BD71815_INT_TEMP_CHIP_OVER_125_DET_MASK BIT(5)
535 #define BD71815_INT_TEMP_CHIP_OVER_VF_RES_MASK BIT(6)
536 #define BD71815_INT_TEMP_CHIP_OVER_VF_DET_MASK BIT(7)
538 #define BD71815_INT_RTC0_MASK BIT(0)
539 #define BD71815_INT_RTC1_MASK BIT(1)
540 #define BD71815_INT_RTC2_MASK BIT(2)
554 #define REX_CLR BIT(4)
557 #define REX_PMU_STATE_MASK BIT(2)
560 #define CHGDONE_LED_EN BIT(4)