614 		 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,  in ufshcd_print_pwr_info()
615 		 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,  in ufshcd_print_pwr_info()
616 		 names[hba->pwr_info.pwr_rx],  in ufshcd_print_pwr_info()
617 		 names[hba->pwr_info.pwr_tx],  in ufshcd_print_pwr_info()
618 		 hba->pwr_info.hs_rate);  in ufshcd_print_pwr_info()
1199 		memcpy(&new_pwr_info, &hba->pwr_info,  in ufshcd_scale_gear()
1202 		if (hba->pwr_info.gear_tx > hba->clk_scaling.min_gear ||  in ufshcd_scale_gear()
1203 		    hba->pwr_info.gear_rx > hba->clk_scaling.min_gear) {  in ufshcd_scale_gear()
1206 				&hba->pwr_info,  in ufshcd_scale_gear()
1220 			hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,  in ufshcd_scale_gear()
3973 		orig_pwr_info = hba->pwr_info;  in ufshcd_dme_get_attr()
4275 	hba->pwr_info.gear_rx = UFS_PWM_G1;  in ufshcd_init_pwr_info()
4276 	hba->pwr_info.gear_tx = UFS_PWM_G1;  in ufshcd_init_pwr_info()
4277 	hba->pwr_info.lane_rx = 1;  in ufshcd_init_pwr_info()
4278 	hba->pwr_info.lane_tx = 1;  in ufshcd_init_pwr_info()
4279 	hba->pwr_info.pwr_rx = SLOWAUTO_MODE;  in ufshcd_init_pwr_info()
4280 	hba->pwr_info.pwr_tx = SLOWAUTO_MODE;  in ufshcd_init_pwr_info()
4281 	hba->pwr_info.hs_rate = 0;  in ufshcd_init_pwr_info()
4290 	struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;  in ufshcd_get_max_pwr_mode()  local
4296 		pwr_info->pwr_tx = FASTAUTO_MODE;  in ufshcd_get_max_pwr_mode()
4297 		pwr_info->pwr_rx = FASTAUTO_MODE;  in ufshcd_get_max_pwr_mode()
4299 		pwr_info->pwr_tx = FAST_MODE;  in ufshcd_get_max_pwr_mode()
4300 		pwr_info->pwr_rx = FAST_MODE;  in ufshcd_get_max_pwr_mode()
4302 	pwr_info->hs_rate = PA_HS_MODE_B;  in ufshcd_get_max_pwr_mode()
4306 			&pwr_info->lane_rx);  in ufshcd_get_max_pwr_mode()
4308 			&pwr_info->lane_tx);  in ufshcd_get_max_pwr_mode()
4310 	if (!pwr_info->lane_rx || !pwr_info->lane_tx) {  in ufshcd_get_max_pwr_mode()
4313 				pwr_info->lane_rx,  in ufshcd_get_max_pwr_mode()
4314 				pwr_info->lane_tx);  in ufshcd_get_max_pwr_mode()
4323 	ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);  in ufshcd_get_max_pwr_mode()
4324 	if (!pwr_info->gear_rx) {  in ufshcd_get_max_pwr_mode()
4326 				&pwr_info->gear_rx);  in ufshcd_get_max_pwr_mode()
4327 		if (!pwr_info->gear_rx) {  in ufshcd_get_max_pwr_mode()
4329 				__func__, pwr_info->gear_rx);  in ufshcd_get_max_pwr_mode()
4332 		pwr_info->pwr_rx = SLOW_MODE;  in ufshcd_get_max_pwr_mode()
4336 			&pwr_info->gear_tx);  in ufshcd_get_max_pwr_mode()
4337 	if (!pwr_info->gear_tx) {  in ufshcd_get_max_pwr_mode()
4339 				&pwr_info->gear_tx);  in ufshcd_get_max_pwr_mode()
4340 		if (!pwr_info->gear_tx) {  in ufshcd_get_max_pwr_mode()
4342 				__func__, pwr_info->gear_tx);  in ufshcd_get_max_pwr_mode()
4345 		pwr_info->pwr_tx = SLOW_MODE;  in ufshcd_get_max_pwr_mode()
4359 	    pwr_mode->gear_rx == hba->pwr_info.gear_rx &&  in ufshcd_change_power_mode()
4360 	    pwr_mode->gear_tx == hba->pwr_info.gear_tx &&  in ufshcd_change_power_mode()
4361 	    pwr_mode->lane_rx == hba->pwr_info.lane_rx &&  in ufshcd_change_power_mode()
4362 	    pwr_mode->lane_tx == hba->pwr_info.lane_tx &&  in ufshcd_change_power_mode()
4363 	    pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&  in ufshcd_change_power_mode()
4364 	    pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&  in ufshcd_change_power_mode()
4365 	    pwr_mode->hs_rate == hba->pwr_info.hs_rate) {  in ufshcd_change_power_mode()
4433 		memcpy(&hba->pwr_info, pwr_mode,  in ufshcd_change_power_mode()
6185 	struct ufs_pa_layer_attr *pwr_info = &hba->pwr_info;  in ufshcd_is_pwr_mode_restore_needed()  local
6190 	if (pwr_info->pwr_rx != ((mode >> PWRMODE_RX_OFFSET) & PWRMODE_MASK))  in ufshcd_is_pwr_mode_restore_needed()
6193 	if (pwr_info->pwr_tx != (mode & PWRMODE_MASK))  in ufshcd_is_pwr_mode_restore_needed()
6353 		pmc_err = ufshcd_config_pwr_mode(hba, &(hba->pwr_info));  in ufshcd_err_handler()
8138 			&hba->pwr_info,  in ufshcd_add_lus()