Lines Matching refs:out_be16
128 out_be16(&psc->mpc52xx_psc_clock_select, prescaler); in mpc52xx_set_divisor()
173 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); in mpc52xx_psc_enable_ms()
183 out_be16(&PSC(port)->mpc52xx_psc_imr, val); in mpc52xx_psc_set_imr()
200 out_be16(&fifo->rfalarm, 0x1ff); in mpc52xx_psc_fifo_init()
202 out_be16(&fifo->tfalarm, 0x80); in mpc52xx_psc_fifo_init()
205 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); in mpc52xx_psc_fifo_init()
245 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); in mpc52xx_psc_start_tx()
251 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); in mpc52xx_psc_stop_tx()
257 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); in mpc52xx_psc_stop_rx()
280 out_be16(&PSC(port)->mpc52xx_psc_imr, 0); in mpc52xx_psc_cw_disable_ints()
285 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); in mpc52xx_psc_cw_restore_ints()
425 out_be16(&PSC(port)->mpc52xx_psc_clock_select, 0xdd00); in mpc512x_psc_fifo_init()
946 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); in mpc5125_psc_enable_ms()
956 out_be16(&PSC_5125(port)->mpc52xx_psc_imr, val); in mpc5125_psc_set_imr()