122 	OUTB(np, nc_istat, SRST);  in sym_chip_reset()
125 	OUTB(np, nc_istat, 0);  in sym_chip_reset()
147 	OUTB(np, nc_istat, CABRT);  in sym_soft_reset()
159 	OUTB(np, nc_istat, 0);  in sym_soft_reset()
189 	OUTB(np, nc_stest3, TE);  in sym_reset_scsi_bus()
190 	OUTB(np, nc_dcntl, (np->rv_dcntl & IRQM));  in sym_reset_scsi_bus()
191 	OUTB(np, nc_scntl1, CRST);  in sym_reset_scsi_bus()
225 	OUTB(np, nc_scntl1, 0);  in sym_reset_scsi_bus()
238 		OUTB(np, nc_scntl3, scntl3);  in sym_selectclock()
245 	OUTB(np, nc_stest1, DBLEN);	   /* Enable clock multiplier */  in sym_selectclock()
261 	OUTB(np, nc_stest3, HSC);		/* Halt the scsi clock	*/  in sym_selectclock()
262 	OUTB(np, nc_scntl3, scntl3);  in sym_selectclock()
263 	OUTB(np, nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier	*/  in sym_selectclock()
264 	OUTB(np, nc_stest3, 0x00);		/* Restart scsi clock 	*/  in sym_selectclock()
311 	OUTB(np, nc_dien, 0);	/* mask all dma interrupts */  in getfreq()
320 		OUTB(np, nc_istat1, SIRQD);  in getfreq()
322 	OUTB(np, nc_scntl3, 4);	   /* set pre-scaler to divide by 3 */  in getfreq()
323 	OUTB(np, nc_stime1, 0);	   /* disable general purpose timer */  in getfreq()
324 	OUTB(np, nc_stime1, gen);  /* set to nominal delay of 1<<gen * 125us */  in getfreq()
327 	OUTB(np, nc_stime1, 0);    /* disable general purpose timer */  in getfreq()
333 		OUTB(np, nc_istat1, 0);  in getfreq()
340  	OUTB(np, nc_scntl3, 0);  in getfreq()
399 		OUTB(np, nc_stest1, 0);		/* make sure doubler is OFF */  in sym_getclock()
446 		OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
448 		OUTB(np, nc_stest1, 0);
1004 	OUTB(np, nc_ctest4, (np->rv_ctest4 & MPEE));
1520 	OUTB(np, nc_istat, SIGP|np->istat_sem);
1704 		OUTB(np, nc_stest3, TE|CSF);
1753 	OUTB(np, nc_istat,  0x00);			/*  Remove Reset, abort */
1757 	OUTB(np, nc_scntl0, np->rv_scntl0 | 0xc0);
1759 	OUTB(np, nc_scntl1, 0x00);		/*  odd parity, and remove CRST!! */
1763 	OUTB(np, nc_scid  , RRE|np->myaddr);	/* Adapter SCSI address */
1765 	OUTB(np, nc_istat , SIGP	);		/*  Signal Process */
1766 	OUTB(np, nc_dmode , np->rv_dmode);		/* Burst length, dma mode */
1767 	OUTB(np, nc_ctest5, np->rv_ctest5);	/* Large fifo + large burst */
1769 	OUTB(np, nc_dcntl , NOCOM|np->rv_dcntl);	/* Protect SFBR */
1770 	OUTB(np, nc_ctest3, np->rv_ctest3);	/* Write and invalidate */
1771 	OUTB(np, nc_ctest4, np->rv_ctest4);	/* Master parity checking */
1775 		OUTB(np, nc_stest2, np->rv_stest2);
1777 		OUTB(np, nc_stest2, EXT|np->rv_stest2);
1779 	OUTB(np, nc_stest3, TE);			/* TolerANT enable */
1780 	OUTB(np, nc_stime0, 0x0c);			/* HTH disabled  STO 0.25 sec */
1786 		OUTB(np, nc_aipcntl1, DISAIP);
1797 		OUTB(np, nc_stest1, INB(np, nc_stest1) | 0x30);
1805 		OUTB(np, nc_ctest0, (1<<5));
1815 		OUTB(np, nc_ccntl0, np->rv_ccntl0);
1816 		OUTB(np, nc_ccntl1, np->rv_ccntl1);
1845 		OUTB(np, nc_gpcntl, INB(np, nc_gpcntl) & ~0x01);
1847 		OUTB(np, nc_gpcntl, (INB(np, nc_gpcntl) & ~0x41) | 0x20);
1853 	OUTB(np, nc_dien , MDPE|BF|SSI|SIR|IID);
2012 	OUTB(np, nc_sxfer,  tp->head.sval);
2013 	OUTB(np, nc_scntl3, tp->head.wval);
2016 		OUTB(np, nc_scntl4, tp->head.uval);
2192 		OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo  */
2193 		OUTB(np, nc_stest3, TE|CSF);		/* clear scsi fifo */
2467 		OUTB(np, nc_ctest3, np->rv_ctest3 | CLF);	/* dma fifo  */
2468 		OUTB(np, nc_stest3, TE|CSF);		/* scsi fifo */
2593 		OUTB(np, HF_PRT, hflags);
2821 		OUTB(np, nc_istat, (istat & SIGP) | INTF | np->istat_sem);
2832 		OUTB(np, nc_istat, CABRT);
2918 	OUTB(np, nc_ctest3, np->rv_ctest3 | CLF);	/* clear dma fifo  */
2919 	OUTB(np, nc_stest3, TE|CSF);		/* clear scsi fifo */
3372 			OUTB(np, nc_istat, SIGP);
3804 	OUTB(np, HF_PRT, hflags);
4032 		OUTB(np, HS_PRT, HS_BUSY);
4169 		OUTB(np, HS_PRT, HS_BUSY);
4269 		OUTB(np, HS_PRT, HS_BUSY);
4300 			OUTB(np, HS_PRT, HS_NEGOTIATE);
4358 	OUTB(np, HS_PRT, HS_BUSY);
4617 		OUTB(np, HS_PRT, HS_BUSY);
5282 	OUTB(np, nc_istat, SIGP|SEM);
5316 	OUTB(np, nc_istat, SIGP|SEM);