Lines Matching refs:MVS_GBL_CTL
151 mw32(MVS_GBL_CTL, 0); in mvs_64xx_chip_reset()
152 tmp = mr32(MVS_GBL_CTL); in mvs_64xx_chip_reset()
170 mw32(MVS_GBL_CTL, 0); in mvs_64xx_chip_reset()
171 tmp = mr32(MVS_GBL_CTL); in mvs_64xx_chip_reset()
176 mw32_f(MVS_GBL_CTL, HBA_RST); in mvs_64xx_chip_reset()
184 if (!(mr32(MVS_GBL_CTL) & HBA_RST)) in mvs_64xx_chip_reset()
187 if (mr32(MVS_GBL_CTL) & HBA_RST) { in mvs_64xx_chip_reset()
425 tmp = mr32(MVS_GBL_CTL); in mvs_64xx_interrupt_enable()
426 mw32(MVS_GBL_CTL, tmp | INT_EN); in mvs_64xx_interrupt_enable()
434 tmp = mr32(MVS_GBL_CTL); in mvs_64xx_interrupt_disable()
435 mw32(MVS_GBL_CTL, tmp & ~INT_EN); in mvs_64xx_interrupt_disable()