Lines Matching refs:cur_col

18 #define ahc_scsiseq_print(regvalue, cur_col, wrap) \
19     ahc_print_register(NULL, 0, "SCSISEQ", 0x00, regvalue, cur_col, wrap)
25 #define ahc_sxfrctl0_print(regvalue, cur_col, wrap) \
26     ahc_print_register(NULL, 0, "SXFRCTL0", 0x01, regvalue, cur_col, wrap)
32 #define ahc_scsisigi_print(regvalue, cur_col, wrap) \
33     ahc_print_register(NULL, 0, "SCSISIGI", 0x03, regvalue, cur_col, wrap)
39 #define ahc_scsirate_print(regvalue, cur_col, wrap) \
40     ahc_print_register(NULL, 0, "SCSIRATE", 0x04, regvalue, cur_col, wrap)
46 #define ahc_sstat0_print(regvalue, cur_col, wrap) \
47     ahc_print_register(NULL, 0, "SSTAT0", 0x0b, regvalue, cur_col, wrap)
53 #define ahc_sstat1_print(regvalue, cur_col, wrap) \
54     ahc_print_register(NULL, 0, "SSTAT1", 0x0c, regvalue, cur_col, wrap)
60 #define ahc_sstat2_print(regvalue, cur_col, wrap) \
61     ahc_print_register(NULL, 0, "SSTAT2", 0x0d, regvalue, cur_col, wrap)
67 #define ahc_sstat3_print(regvalue, cur_col, wrap) \
68     ahc_print_register(NULL, 0, "SSTAT3", 0x0e, regvalue, cur_col, wrap)
74 #define ahc_simode0_print(regvalue, cur_col, wrap) \
75     ahc_print_register(NULL, 0, "SIMODE0", 0x10, regvalue, cur_col, wrap)
81 #define ahc_simode1_print(regvalue, cur_col, wrap) \
82     ahc_print_register(NULL, 0, "SIMODE1", 0x11, regvalue, cur_col, wrap)
88 #define ahc_scsibusl_print(regvalue, cur_col, wrap) \
89     ahc_print_register(NULL, 0, "SCSIBUSL", 0x12, regvalue, cur_col, wrap)
95 #define ahc_sblkctl_print(regvalue, cur_col, wrap) \
96     ahc_print_register(NULL, 0, "SBLKCTL", 0x1f, regvalue, cur_col, wrap)
102 #define ahc_seq_flags_print(regvalue, cur_col, wrap) \
103     ahc_print_register(NULL, 0, "SEQ_FLAGS", 0x3c, regvalue, cur_col, wrap)
109 #define ahc_lastphase_print(regvalue, cur_col, wrap) \
110     ahc_print_register(NULL, 0, "LASTPHASE", 0x3f, regvalue, cur_col, wrap)
116 #define ahc_seqctl_print(regvalue, cur_col, wrap) \
117     ahc_print_register(NULL, 0, "SEQCTL", 0x60, regvalue, cur_col, wrap)
123 #define ahc_sram_base_print(regvalue, cur_col, wrap) \
124     ahc_print_register(NULL, 0, "SRAM_BASE", 0x70, regvalue, cur_col, wrap)
130 #define ahc_error_print(regvalue, cur_col, wrap) \
131     ahc_print_register(NULL, 0, "ERROR", 0x92, regvalue, cur_col, wrap)
137 #define ahc_dfcntrl_print(regvalue, cur_col, wrap) \
138     ahc_print_register(NULL, 0, "DFCNTRL", 0x93, regvalue, cur_col, wrap)
144 #define ahc_dfstatus_print(regvalue, cur_col, wrap) \
145     ahc_print_register(NULL, 0, "DFSTATUS", 0x94, regvalue, cur_col, wrap)
151 #define ahc_scsiphase_print(regvalue, cur_col, wrap) \
152     ahc_print_register(NULL, 0, "SCSIPHASE", 0x9e, regvalue, cur_col, wrap)
158 #define ahc_scb_base_print(regvalue, cur_col, wrap) \
159     ahc_print_register(NULL, 0, "SCB_BASE", 0xa0, regvalue, cur_col, wrap)
165 #define ahc_scb_control_print(regvalue, cur_col, wrap) \
166     ahc_print_register(NULL, 0, "SCB_CONTROL", 0xb8, regvalue, cur_col, wrap)
172 #define ahc_scb_scsiid_print(regvalue, cur_col, wrap) \
173     ahc_print_register(NULL, 0, "SCB_SCSIID", 0xb9, regvalue, cur_col, wrap)
179 #define ahc_scb_lun_print(regvalue, cur_col, wrap) \
180     ahc_print_register(NULL, 0, "SCB_LUN", 0xba, regvalue, cur_col, wrap)
186 #define ahc_scb_tag_print(regvalue, cur_col, wrap) \
187     ahc_print_register(NULL, 0, "SCB_TAG", 0xbb, regvalue, cur_col, wrap)