1615 		u_int	scsirate;  in ahc_handle_scsiint()  local
1656 		scsirate = ahc_inb(ahc, SCSIRATE);  in ahc_handle_scsiint()
1662 			       scsirate);  in ahc_handle_scsiint()
1674 					       (scsirate & SINGLE_EDGE)  in ahc_handle_scsiint()
2322 ahc_find_period(struct ahc_softc *ahc, u_int scsirate, u_int maxsync)  in ahc_find_period()  argument
2327 		scsirate &= SXFR_ULTRA2;  in ahc_find_period()
2329 		scsirate &= SXFR;  in ahc_find_period()
2348 			else if (scsirate == (syncrate->sxfr_u2 & SXFR_ULTRA2))  in ahc_find_period()
2350 		} else if (scsirate == (syncrate->sxfr & SXFR)) {  in ahc_find_period()
2511 		u_int	scsirate;  in ahc_set_syncrate()  local
2514 		scsirate = tinfo->scsirate;  in ahc_set_syncrate()
2517 			scsirate &= ~(SXFR_ULTRA2|SINGLE_EDGE|ENABLE_CRC);  in ahc_set_syncrate()
2519 				scsirate |= syncrate->sxfr_u2;  in ahc_set_syncrate()
2521 					scsirate |= ENABLE_CRC;  in ahc_set_syncrate()
2523 					scsirate |= SINGLE_EDGE;  in ahc_set_syncrate()
2527 			scsirate &= ~(SXFR|SOFS);  in ahc_set_syncrate()
2538 				scsirate |= syncrate->sxfr & SXFR;  in ahc_set_syncrate()
2539 				scsirate |= offset & SOFS;  in ahc_set_syncrate()
2552 			ahc_outb(ahc, SCSIRATE, scsirate);  in ahc_set_syncrate()
2557 		tinfo->scsirate = scsirate;  in ahc_set_syncrate()
2617 		u_int	scsirate;  in ahc_set_width()  local
2620 		scsirate =  tinfo->scsirate;  in ahc_set_width()
2621 		scsirate &= ~WIDEXFER;  in ahc_set_width()
2623 			scsirate |= WIDEXFER;  in ahc_set_width()
2625 		tinfo->scsirate = scsirate;  in ahc_set_width()
2628 			ahc_outb(ahc, SCSIRATE, scsirate);  in ahc_set_width()
2694 		pending_hscb->scsirate = tinfo->scsirate;  in ahc_update_pending_scbs()
2734 		ahc_outb(ahc, SCB_SCSIRATE, pending_hscb->scsirate);  in ahc_update_pending_scbs()
3573 	targ_scsirate = tinfo->scsirate;  in ahc_parse_msg()
5452 			u_int scsirate;  in ahc_init()  local
5456 			scsirate = ahc_inb(ahc, TARG_SCSIRATE + i);  in ahc_init()
5462 				if ((scsirate & SOFS) == 0x0F) {  in ahc_init()
5467 					scsirate = (scsirate & SXFR) >> 4  in ahc_init()
5470 						 | (scsirate & WIDEXFER);  in ahc_init()
5474 				if ((scsirate & ~WIDEXFER) == 0 && offset != 0)  in ahc_init()
5476 					scsirate |= 0x1c;  in ahc_init()
5481 				    ahc_find_period(ahc, scsirate, maxsync);  in ahc_init()
5486 				if ((scsirate & SXFR_ULTRA2) <= 8/*10MHz*/  in ahc_init()
5490 			} else if ((scsirate & SOFS) != 0) {  in ahc_init()
5491 				if ((scsirate & SXFR) == 0x40  in ahc_init()
5494 					scsirate &= ~SXFR;  in ahc_init()
5498 				    ahc_find_period(ahc, scsirate,  in ahc_init()
5507 			if ((scsirate & WIDEXFER) != 0  in ahc_init()