Lines Matching refs:user_tinfo
7639 struct ahd_transinfo *user_tinfo; in ahd_parse_cfgdata() local
7645 user_tinfo = &tinfo->user; in ahd_parse_cfgdata()
7668 user_tinfo->ppr_options = 0; in ahd_parse_cfgdata()
7669 user_tinfo->period = (sc->device_flags[targ] & CFXFER); in ahd_parse_cfgdata()
7670 if (user_tinfo->period < CFXFER_ASYNC) { in ahd_parse_cfgdata()
7671 if (user_tinfo->period <= AHD_PERIOD_10MHz) in ahd_parse_cfgdata()
7672 user_tinfo->ppr_options |= MSG_EXT_PPR_DT_REQ; in ahd_parse_cfgdata()
7673 user_tinfo->offset = MAX_OFFSET; in ahd_parse_cfgdata()
7675 user_tinfo->offset = 0; in ahd_parse_cfgdata()
7676 user_tinfo->period = AHD_ASYNC_XFER_PERIOD; in ahd_parse_cfgdata()
7679 if (user_tinfo->period <= AHD_SYNCRATE_160) in ahd_parse_cfgdata()
7680 user_tinfo->period = AHD_SYNCRATE_DT; in ahd_parse_cfgdata()
7684 user_tinfo->ppr_options |= MSG_EXT_PPR_RD_STRM in ahd_parse_cfgdata()
7689 user_tinfo->ppr_options |= MSG_EXT_PPR_RTI; in ahd_parse_cfgdata()
7693 user_tinfo->ppr_options |= MSG_EXT_PPR_QAS_REQ; in ahd_parse_cfgdata()
7696 user_tinfo->width = MSG_EXT_WDTR_BUS_16_BIT; in ahd_parse_cfgdata()
7698 user_tinfo->width = MSG_EXT_WDTR_BUS_8_BIT; in ahd_parse_cfgdata()
7701 printk("(%d): %x:%x:%x:%x\n", targ, user_tinfo->width, in ahd_parse_cfgdata()
7702 user_tinfo->period, user_tinfo->offset, in ahd_parse_cfgdata()
7703 user_tinfo->ppr_options); in ahd_parse_cfgdata()