222 	struct meson_pwm_channel_data *channel_data;  in meson_pwm_enable()  local
226 	channel_data = &meson_pwm_per_channel_data[pwm->hwpwm];  in meson_pwm_enable()
231 	value &= ~(MISC_CLK_DIV_MASK << channel_data->clk_div_shift);  in meson_pwm_enable()
232 	value |= channel->pre_div << channel_data->clk_div_shift;  in meson_pwm_enable()
233 	value |= channel_data->clk_en_mask;  in meson_pwm_enable()
238 	writel(value, meson->base + channel_data->reg_offset);  in meson_pwm_enable()
241 	value |= channel_data->pwm_en_mask;  in meson_pwm_enable()
325 	struct meson_pwm_channel_data *channel_data;  in meson_pwm_get_state()  local
333 	channel_data = &meson_pwm_per_channel_data[pwm->hwpwm];  in meson_pwm_get_state()
337 	tmp = channel_data->pwm_en_mask | channel_data->clk_en_mask;  in meson_pwm_get_state()
340 	tmp = value >> channel_data->clk_div_shift;  in meson_pwm_get_state()
343 	value = readl(meson->base + channel_data->reg_offset);  in meson_pwm_get_state()