Lines Matching refs:SUNXI_FUNCTION
21 SUNXI_FUNCTION(0x2, "emac1")), /* ERXD1 */
23 SUNXI_FUNCTION(0x2, "emac1")), /* ERXD0 */
25 SUNXI_FUNCTION(0x2, "emac1")), /* ECRS_DV */
27 SUNXI_FUNCTION(0x2, "emac1")), /* ERXERR */
29 SUNXI_FUNCTION(0x2, "emac1")), /* ETXD1 */
31 SUNXI_FUNCTION(0x2, "emac1")), /* ETXD0 */
33 SUNXI_FUNCTION(0x2, "emac1")), /* ETXCK */
35 SUNXI_FUNCTION(0x2, "emac1")), /* ETXEN */
37 SUNXI_FUNCTION(0x2, "emac1")), /* EMDC */
39 SUNXI_FUNCTION(0x2, "emac1")), /* EMDIO */
41 SUNXI_FUNCTION(0x2, "i2c3")), /* SCK */
43 SUNXI_FUNCTION(0x2, "i2c3")), /* SDA */
45 SUNXI_FUNCTION(0x2, "pwm5")),
48 SUNXI_FUNCTION(0x0, "gpio_in"),
49 SUNXI_FUNCTION(0x1, "gpio_out"),
50 SUNXI_FUNCTION(0x2, "nand0"), /* WE */
51 SUNXI_FUNCTION(0x3, "mmc2"), /* DS */
52 SUNXI_FUNCTION(0x4, "spi0"), /* CLK */
55 SUNXI_FUNCTION(0x0, "gpio_in"),
56 SUNXI_FUNCTION(0x1, "gpio_out"),
57 SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
58 SUNXI_FUNCTION(0x3, "mmc2"), /* RST */
61 SUNXI_FUNCTION(0x0, "gpio_in"),
62 SUNXI_FUNCTION(0x1, "gpio_out"),
63 SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
64 SUNXI_FUNCTION(0x4, "spi0"), /* MOSI */
67 SUNXI_FUNCTION(0x0, "gpio_in"),
68 SUNXI_FUNCTION(0x1, "gpio_out"),
69 SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */
70 SUNXI_FUNCTION(0x4, "spi0"), /* CS0 */
73 SUNXI_FUNCTION(0x0, "gpio_in"),
74 SUNXI_FUNCTION(0x1, "gpio_out"),
75 SUNXI_FUNCTION(0x2, "nand0"), /* CE0 */
76 SUNXI_FUNCTION(0x4, "spi0"), /* MISO */
79 SUNXI_FUNCTION(0x0, "gpio_in"),
80 SUNXI_FUNCTION(0x1, "gpio_out"),
81 SUNXI_FUNCTION(0x2, "nand0"), /* RE */
82 SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */
85 SUNXI_FUNCTION(0x0, "gpio_in"),
86 SUNXI_FUNCTION(0x1, "gpio_out"),
87 SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
88 SUNXI_FUNCTION(0x3, "mmc2"), /* CMD */
91 SUNXI_FUNCTION(0x0, "gpio_in"),
92 SUNXI_FUNCTION(0x1, "gpio_out"),
93 SUNXI_FUNCTION(0x2, "nand0"), /* RB1 */
94 SUNXI_FUNCTION(0x4, "spi0"), /* CS1 */
97 SUNXI_FUNCTION(0x0, "gpio_in"),
98 SUNXI_FUNCTION(0x1, "gpio_out"),
99 SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
100 SUNXI_FUNCTION(0x3, "mmc2"), /* D3 */
103 SUNXI_FUNCTION(0x0, "gpio_in"),
104 SUNXI_FUNCTION(0x1, "gpio_out"),
105 SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
106 SUNXI_FUNCTION(0x3, "mmc2"), /* D4 */
109 SUNXI_FUNCTION(0x0, "gpio_in"),
110 SUNXI_FUNCTION(0x1, "gpio_out"),
111 SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
112 SUNXI_FUNCTION(0x3, "mmc2"), /* D0 */
115 SUNXI_FUNCTION(0x0, "gpio_in"),
116 SUNXI_FUNCTION(0x1, "gpio_out"),
117 SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
118 SUNXI_FUNCTION(0x3, "mmc2"), /* D5 */
121 SUNXI_FUNCTION(0x0, "gpio_in"),
122 SUNXI_FUNCTION(0x1, "gpio_out"),
123 SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
126 SUNXI_FUNCTION(0x0, "gpio_in"),
127 SUNXI_FUNCTION(0x1, "gpio_out"),
128 SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
129 SUNXI_FUNCTION(0x3, "mmc2"), /* D1 */
132 SUNXI_FUNCTION(0x0, "gpio_in"),
133 SUNXI_FUNCTION(0x1, "gpio_out"),
134 SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
135 SUNXI_FUNCTION(0x3, "mmc2"), /* D6 */
138 SUNXI_FUNCTION(0x0, "gpio_in"),
139 SUNXI_FUNCTION(0x1, "gpio_out"),
140 SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
141 SUNXI_FUNCTION(0x3, "mmc2"), /* D2 */
142 SUNXI_FUNCTION(0x4, "spi0"), /* WP */
145 SUNXI_FUNCTION(0x0, "gpio_in"),
146 SUNXI_FUNCTION(0x1, "gpio_out"),
147 SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
148 SUNXI_FUNCTION(0x3, "mmc2"), /* D7 */
149 SUNXI_FUNCTION(0x4, "spi0"), /* HOLD */
153 SUNXI_FUNCTION(0x0, "gpio_in"),
154 SUNXI_FUNCTION(0x1, "gpio_out"),
155 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
156 SUNXI_FUNCTION(0x3, "jtag"), /* MS */
159 SUNXI_FUNCTION(0x0, "gpio_in"),
160 SUNXI_FUNCTION(0x1, "gpio_out"),
161 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
162 SUNXI_FUNCTION(0x3, "jtag"), /* DI */
165 SUNXI_FUNCTION(0x0, "gpio_in"),
166 SUNXI_FUNCTION(0x1, "gpio_out"),
167 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
168 SUNXI_FUNCTION(0x3, "uart0"), /* TX */
171 SUNXI_FUNCTION(0x0, "gpio_in"),
172 SUNXI_FUNCTION(0x1, "gpio_out"),
173 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
174 SUNXI_FUNCTION(0x3, "jtag"), /* DO */
177 SUNXI_FUNCTION(0x0, "gpio_in"),
178 SUNXI_FUNCTION(0x1, "gpio_out"),
179 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
180 SUNXI_FUNCTION(0x3, "uart0"), /* RX */
183 SUNXI_FUNCTION(0x0, "gpio_in"),
184 SUNXI_FUNCTION(0x1, "gpio_out"),
185 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
186 SUNXI_FUNCTION(0x3, "jtag"), /* CK */
189 SUNXI_FUNCTION(0x0, "gpio_in"),
190 SUNXI_FUNCTION(0x1, "gpio_out"),
194 SUNXI_FUNCTION(0x0, "gpio_in"),
195 SUNXI_FUNCTION(0x1, "gpio_out"),
196 SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
199 SUNXI_FUNCTION(0x0, "gpio_in"),
200 SUNXI_FUNCTION(0x1, "gpio_out"),
201 SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
204 SUNXI_FUNCTION(0x0, "gpio_in"),
205 SUNXI_FUNCTION(0x1, "gpio_out"),
206 SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
209 SUNXI_FUNCTION(0x0, "gpio_in"),
210 SUNXI_FUNCTION(0x1, "gpio_out"),
211 SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
214 SUNXI_FUNCTION(0x0, "gpio_in"),
215 SUNXI_FUNCTION(0x1, "gpio_out"),
216 SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
219 SUNXI_FUNCTION(0x0, "gpio_in"),
220 SUNXI_FUNCTION(0x1, "gpio_out"),
221 SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
224 SUNXI_FUNCTION(0x0, "gpio_in"),
225 SUNXI_FUNCTION(0x1, "gpio_out"),
226 SUNXI_FUNCTION(0x2, "uart1"), /* TX */
227 SUNXI_FUNCTION(0x4, "jtag"), /* MS */
230 SUNXI_FUNCTION(0x0, "gpio_in"),
231 SUNXI_FUNCTION(0x1, "gpio_out"),
232 SUNXI_FUNCTION(0x2, "uart1"), /* RX */
233 SUNXI_FUNCTION(0x4, "jtag"), /* CK */
236 SUNXI_FUNCTION(0x0, "gpio_in"),
237 SUNXI_FUNCTION(0x1, "gpio_out"),
238 SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
239 SUNXI_FUNCTION(0x3, "clock"), /* PLL_LOCK_DEBUG */
240 SUNXI_FUNCTION(0x4, "jtag"), /* DO */
243 SUNXI_FUNCTION(0x0, "gpio_in"),
244 SUNXI_FUNCTION(0x1, "gpio_out"),
245 SUNXI_FUNCTION(0x2, "uart1"), /* CTS */
248 SUNXI_FUNCTION(0x0, "gpio_in"),
249 SUNXI_FUNCTION(0x1, "gpio_out"),
250 SUNXI_FUNCTION(0x2, "i2s2"), /* MCLK */
251 SUNXI_FUNCTION(0x3, "clock"), /* X32KFOUT */
254 SUNXI_FUNCTION(0x0, "gpio_in"),
255 SUNXI_FUNCTION(0x1, "gpio_out"),
256 SUNXI_FUNCTION(0x2, "i2s2"), /* BCLK */
259 SUNXI_FUNCTION(0x0, "gpio_in"),
260 SUNXI_FUNCTION(0x1, "gpio_out"),
261 SUNXI_FUNCTION(0x2, "i2s2"), /* SYNC */
264 SUNXI_FUNCTION(0x0, "gpio_in"),
265 SUNXI_FUNCTION(0x1, "gpio_out"),
266 SUNXI_FUNCTION(0x2, "i2s2"), /* DOUT */
269 SUNXI_FUNCTION(0x0, "gpio_in"),
270 SUNXI_FUNCTION(0x1, "gpio_out"),
271 SUNXI_FUNCTION(0x2, "i2s2"), /* DIN */
274 SUNXI_FUNCTION(0x0, "gpio_in"),
275 SUNXI_FUNCTION(0x1, "gpio_out"),
276 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
277 SUNXI_FUNCTION(0x5, "i2c4"), /* SCK */
280 SUNXI_FUNCTION(0x0, "gpio_in"),
281 SUNXI_FUNCTION(0x1, "gpio_out"),
282 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
283 SUNXI_FUNCTION(0x5, "i2c4"), /* SDA */
286 SUNXI_FUNCTION(0x0, "gpio_in"),
287 SUNXI_FUNCTION(0x1, "gpio_out"),
288 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
289 SUNXI_FUNCTION(0x5, "i2c3"), /* SCK */
292 SUNXI_FUNCTION(0x0, "gpio_in"),
293 SUNXI_FUNCTION(0x1, "gpio_out"),
294 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
295 SUNXI_FUNCTION(0x5, "i2c3"), /* SDA */
298 SUNXI_FUNCTION(0x0, "gpio_in"),
299 SUNXI_FUNCTION(0x1, "gpio_out"),
300 SUNXI_FUNCTION(0x4, "pwm1"),
304 SUNXI_FUNCTION(0x0, "gpio_in"),
305 SUNXI_FUNCTION(0x1, "gpio_out"),
306 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
307 SUNXI_FUNCTION(0x4, "pwm3"),
308 SUNXI_FUNCTION(0x5, "i2c1"), /* SCK */
311 SUNXI_FUNCTION(0x0, "gpio_in"),
312 SUNXI_FUNCTION(0x1, "gpio_out"),
313 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
314 SUNXI_FUNCTION(0x4, "pwm4"),
315 SUNXI_FUNCTION(0x5, "i2c1"), /* SDA */
318 SUNXI_FUNCTION(0x0, "gpio_in"),
319 SUNXI_FUNCTION(0x1, "gpio_out"),
320 SUNXI_FUNCTION(0x2, "uart5"), /* TX */
321 SUNXI_FUNCTION(0x3, "spdif"), /* MCLK */
322 SUNXI_FUNCTION(0x4, "pwm2"),
323 SUNXI_FUNCTION(0x5, "i2c2"), /* SCK */
326 SUNXI_FUNCTION(0x0, "gpio_in"),
327 SUNXI_FUNCTION(0x1, "gpio_out"),
328 SUNXI_FUNCTION(0x2, "uart5"), /* RX */
329 SUNXI_FUNCTION(0x4, "pwm1"),
330 SUNXI_FUNCTION(0x5, "i2c2"), /* SDA */
333 SUNXI_FUNCTION(0x0, "gpio_in"),
334 SUNXI_FUNCTION(0x1, "gpio_out"),
335 SUNXI_FUNCTION(0x3, "spdif"), /* OUT */
336 SUNXI_FUNCTION(0x5, "i2c3"), /* SCK */
339 SUNXI_FUNCTION(0x0, "gpio_in"),
340 SUNXI_FUNCTION(0x1, "gpio_out"),
341 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
342 SUNXI_FUNCTION(0x3, "i2s3"), /* MCLK */
343 SUNXI_FUNCTION(0x4, "spi1"), /* CS0 */
344 SUNXI_FUNCTION(0x5, "i2c3"), /* SDA */
347 SUNXI_FUNCTION(0x0, "gpio_in"),
348 SUNXI_FUNCTION(0x1, "gpio_out"),
349 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
350 SUNXI_FUNCTION(0x3, "i2s3"), /* BCLK */
351 SUNXI_FUNCTION(0x4, "spi1"), /* CLK */
352 SUNXI_FUNCTION(0x5, "i2c4"), /* SCK */
355 SUNXI_FUNCTION(0x0, "gpio_in"),
356 SUNXI_FUNCTION(0x1, "gpio_out"),
357 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
358 SUNXI_FUNCTION(0x3, "i2s3"), /* SYNC */
359 SUNXI_FUNCTION(0x4, "spi1"), /* MOSI */
360 SUNXI_FUNCTION(0x5, "i2c4"), /* SDA */
363 SUNXI_FUNCTION(0x0, "gpio_in"),
364 SUNXI_FUNCTION(0x1, "gpio_out"),
365 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
366 SUNXI_FUNCTION(0x3, "i2s3_dout0"), /* DO0 */
367 SUNXI_FUNCTION(0x4, "spi1"), /* MISO */
368 SUNXI_FUNCTION(0x5, "i2s3_din1"), /* DI1 */
371 SUNXI_FUNCTION(0x0, "gpio_in"),
372 SUNXI_FUNCTION(0x1, "gpio_out"),
373 SUNXI_FUNCTION(0x3, "i2s3_din0"), /* DI0 */
374 SUNXI_FUNCTION(0x4, "spi1"), /* CS1 */
375 SUNXI_FUNCTION(0x5, "i2s3_dout1"), /* DO1 */
378 SUNXI_FUNCTION(0x0, "gpio_in"),
379 SUNXI_FUNCTION(0x1, "gpio_out"),
380 SUNXI_FUNCTION(0x3, "ir_rx"),
384 SUNXI_FUNCTION(0x0, "gpio_in"),
385 SUNXI_FUNCTION(0x1, "gpio_out"),
386 SUNXI_FUNCTION(0x2, "emac0"), /* ERXD3 */
387 SUNXI_FUNCTION(0x3, "dmic"), /* CLK */
388 SUNXI_FUNCTION(0x4, "i2s0"), /* MCLK */
389 SUNXI_FUNCTION(0x5, "hdmi"), /* HSCL */
392 SUNXI_FUNCTION(0x0, "gpio_in"),
393 SUNXI_FUNCTION(0x1, "gpio_out"),
394 SUNXI_FUNCTION(0x2, "emac0"), /* ERXD2 */
395 SUNXI_FUNCTION(0x3, "dmic"), /* DATA0 */
396 SUNXI_FUNCTION(0x4, "i2s0"), /* BCLK */
397 SUNXI_FUNCTION(0x5, "hdmi"), /* HSDA */
400 SUNXI_FUNCTION(0x0, "gpio_in"),
401 SUNXI_FUNCTION(0x1, "gpio_out"),
402 SUNXI_FUNCTION(0x2, "emac0"), /* ERXD1 */
403 SUNXI_FUNCTION(0x3, "dmic"), /* DATA1 */
404 SUNXI_FUNCTION(0x4, "i2s0"), /* SYNC */
405 SUNXI_FUNCTION(0x5, "hdmi"), /* HCEC */
408 SUNXI_FUNCTION(0x0, "gpio_in"),
409 SUNXI_FUNCTION(0x1, "gpio_out"),
410 SUNXI_FUNCTION(0x2, "emac0"), /* ERXD0 */
411 SUNXI_FUNCTION(0x3, "dmic"), /* DATA2 */
412 SUNXI_FUNCTION(0x4, "i2s0_dout0"), /* DO0 */
413 SUNXI_FUNCTION(0x5, "i2s0_din1"), /* DI1 */
416 SUNXI_FUNCTION(0x0, "gpio_in"),
417 SUNXI_FUNCTION(0x1, "gpio_out"),
418 SUNXI_FUNCTION(0x2, "emac0"), /* ERXCK */
419 SUNXI_FUNCTION(0x3, "dmic"), /* DATA3 */
420 SUNXI_FUNCTION(0x4, "i2s0_din0"), /* DI0 */
421 SUNXI_FUNCTION(0x5, "i2s0_dout1"), /* DO1 */
424 SUNXI_FUNCTION(0x0, "gpio_in"),
425 SUNXI_FUNCTION(0x1, "gpio_out"),
426 SUNXI_FUNCTION(0x2, "emac0"), /* ERXCTL */
427 SUNXI_FUNCTION(0x3, "uart2"), /* TX */
428 SUNXI_FUNCTION(0x4, "ts0"), /* CLK */
429 SUNXI_FUNCTION(0x5, "i2c0"), /* SCK */
432 SUNXI_FUNCTION(0x0, "gpio_in"),
433 SUNXI_FUNCTION(0x1, "gpio_out"),
434 SUNXI_FUNCTION(0x2, "emac0"), /* ENULL */
435 SUNXI_FUNCTION(0x3, "uart2"), /* RX */
436 SUNXI_FUNCTION(0x4, "ts0"), /* ERR */
437 SUNXI_FUNCTION(0x5, "i2c0"), /* SDA */
440 SUNXI_FUNCTION(0x0, "gpio_in"),
441 SUNXI_FUNCTION(0x1, "gpio_out"),
442 SUNXI_FUNCTION(0x2, "emac0"), /* ETXD3 */
443 SUNXI_FUNCTION(0x3, "uart2"), /* RTS */
444 SUNXI_FUNCTION(0x4, "ts0"), /* SYNC */
445 SUNXI_FUNCTION(0x5, "i2c1"), /* SCK */
448 SUNXI_FUNCTION(0x0, "gpio_in"),
449 SUNXI_FUNCTION(0x1, "gpio_out"),
450 SUNXI_FUNCTION(0x2, "emac0"), /* ETXD2 */
451 SUNXI_FUNCTION(0x3, "uart2"), /* CTS */
452 SUNXI_FUNCTION(0x4, "ts0"), /* DVLD */
453 SUNXI_FUNCTION(0x5, "i2c1"), /* SDA */
456 SUNXI_FUNCTION(0x0, "gpio_in"),
457 SUNXI_FUNCTION(0x1, "gpio_out"),
458 SUNXI_FUNCTION(0x2, "emac0"), /* ETXD1 */
459 SUNXI_FUNCTION(0x3, "uart3"), /* TX */
460 SUNXI_FUNCTION(0x4, "ts0"), /* D0 */
461 SUNXI_FUNCTION(0x5, "i2c2"), /* SCK */
464 SUNXI_FUNCTION(0x0, "gpio_in"),
465 SUNXI_FUNCTION(0x1, "gpio_out"),
466 SUNXI_FUNCTION(0x2, "emac0"), /* ETXD0 */
467 SUNXI_FUNCTION(0x3, "uart3"), /* RX */
468 SUNXI_FUNCTION(0x4, "ts0"), /* D1 */
469 SUNXI_FUNCTION(0x5, "i2c2"), /* SDA */
472 SUNXI_FUNCTION(0x0, "gpio_in"),
473 SUNXI_FUNCTION(0x1, "gpio_out"),
474 SUNXI_FUNCTION(0x2, "emac0"), /* ETXCK */
475 SUNXI_FUNCTION(0x3, "uart3"), /* RTS */
476 SUNXI_FUNCTION(0x4, "ts0"), /* D2 */
477 SUNXI_FUNCTION(0x5, "pwm1"),
480 SUNXI_FUNCTION(0x0, "gpio_in"),
481 SUNXI_FUNCTION(0x1, "gpio_out"),
482 SUNXI_FUNCTION(0x2, "emac0"), /* ETXCTL */
483 SUNXI_FUNCTION(0x3, "uart3"), /* CTS */
484 SUNXI_FUNCTION(0x4, "ts0"), /* D3 */
485 SUNXI_FUNCTION(0x5, "pwm2"),
488 SUNXI_FUNCTION(0x0, "gpio_in"),
489 SUNXI_FUNCTION(0x1, "gpio_out"),
490 SUNXI_FUNCTION(0x2, "emac0"), /* ECLKIN */
491 SUNXI_FUNCTION(0x3, "uart4"), /* TX */
492 SUNXI_FUNCTION(0x4, "ts0"), /* D4 */
493 SUNXI_FUNCTION(0x5, "pwm3"),
496 SUNXI_FUNCTION(0x0, "gpio_in"),
497 SUNXI_FUNCTION(0x1, "gpio_out"),
498 SUNXI_FUNCTION(0x2, "emac0"), /* MDC */
499 SUNXI_FUNCTION(0x3, "uart4"), /* RX */
500 SUNXI_FUNCTION(0x4, "ts0"), /* D5 */
501 SUNXI_FUNCTION(0x5, "pwm4"),
504 SUNXI_FUNCTION(0x0, "gpio_in"),
505 SUNXI_FUNCTION(0x1, "gpio_out"),
506 SUNXI_FUNCTION(0x2, "emac0"), /* MDIO */
507 SUNXI_FUNCTION(0x3, "uart4"), /* RTS */
508 SUNXI_FUNCTION(0x4, "ts0"), /* D6 */
509 SUNXI_FUNCTION(0x5, "clock"), /* CLK_FANOUT0 */
512 SUNXI_FUNCTION(0x0, "gpio_in"),
513 SUNXI_FUNCTION(0x1, "gpio_out"),
514 SUNXI_FUNCTION(0x2, "emac0"), /* EPHY_CLK */
515 SUNXI_FUNCTION(0x3, "uart4"), /* CTS */
516 SUNXI_FUNCTION(0x4, "ts0"), /* D7 */
517 SUNXI_FUNCTION(0x5, "clock"), /* CLK_FANOUT1 */