Lines Matching refs:SUNXI_FUNCTION
19 SUNXI_FUNCTION(0x0, "gpio_in"),
20 SUNXI_FUNCTION(0x1, "gpio_out"),
21 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
22 SUNXI_FUNCTION(0x3, "spi2"), /* CS */
23 SUNXI_FUNCTION(0x4, "jtag"), /* MS */
26 SUNXI_FUNCTION(0x0, "gpio_in"),
27 SUNXI_FUNCTION(0x1, "gpio_out"),
28 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
29 SUNXI_FUNCTION(0x3, "spi2"), /* CLK */
30 SUNXI_FUNCTION(0x4, "jtag"), /* CK */
33 SUNXI_FUNCTION(0x0, "gpio_in"),
34 SUNXI_FUNCTION(0x1, "gpio_out"),
35 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
36 SUNXI_FUNCTION(0x3, "spi2"), /* MOSI */
37 SUNXI_FUNCTION(0x4, "jtag"), /* DO */
40 SUNXI_FUNCTION(0x0, "gpio_in"),
41 SUNXI_FUNCTION(0x1, "gpio_out"),
42 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
43 SUNXI_FUNCTION(0x3, "spi2"), /* MISO */
44 SUNXI_FUNCTION(0x4, "jtag"), /* DI */
47 SUNXI_FUNCTION(0x0, "gpio_in"),
48 SUNXI_FUNCTION(0x1, "gpio_out"),
49 SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
50 SUNXI_FUNCTION(0x3, "i2s0"), /* MCLK */
51 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* MS_GPU */
54 SUNXI_FUNCTION(0x0, "gpio_in"),
55 SUNXI_FUNCTION(0x1, "gpio_out"),
56 SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
57 SUNXI_FUNCTION(0x3, "i2s0"), /* BCLK */
58 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* CK_GPU */
61 SUNXI_FUNCTION(0x0, "gpio_in"),
62 SUNXI_FUNCTION(0x1, "gpio_out"),
63 SUNXI_FUNCTION(0x3, "i2s0"), /* LRCK */
64 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DO_GPU */
67 SUNXI_FUNCTION(0x0, "gpio_in"),
68 SUNXI_FUNCTION(0x1, "gpio_out"),
69 SUNXI_FUNCTION(0x2, "spdif"), /* DIN */
70 SUNXI_FUNCTION(0x3, "i2s0_dout0"), /* DOUT0 */
71 SUNXI_FUNCTION(0x4, "i2s0_din1"), /* DIN1 */
74 SUNXI_FUNCTION(0x0, "gpio_in"),
75 SUNXI_FUNCTION(0x1, "gpio_out"),
76 SUNXI_FUNCTION(0x2, "spdif"), /* DOUT */
77 SUNXI_FUNCTION(0x3, "i2s0_din0"), /* DIN0 */
78 SUNXI_FUNCTION(0x4, "i2s0_dout1"), /* DOUT1 */
81 SUNXI_FUNCTION(0x0, "gpio_in"),
82 SUNXI_FUNCTION(0x1, "gpio_out"),
83 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
84 SUNXI_FUNCTION(0x3, "i2c0"), /* SCK */
85 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DI_GPU */
88 SUNXI_FUNCTION(0x0, "gpio_in"),
89 SUNXI_FUNCTION(0x1, "gpio_out"),
90 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
91 SUNXI_FUNCTION(0x3, "i2c0"), /* SDA */
92 SUNXI_FUNCTION(0x4, "pwm1"),
96 SUNXI_FUNCTION(0x0, "gpio_in"),
97 SUNXI_FUNCTION(0x1, "gpio_out"),
98 SUNXI_FUNCTION(0x2, "nand0"), /* WE */
99 SUNXI_FUNCTION(0x3, "mmc2"), /* DS */
102 SUNXI_FUNCTION(0x0, "gpio_in"),
103 SUNXI_FUNCTION(0x1, "gpio_out"),
104 SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
105 SUNXI_FUNCTION(0x3, "mmc2"), /* RST */
108 SUNXI_FUNCTION(0x0, "gpio_in"),
109 SUNXI_FUNCTION(0x1, "gpio_out"),
110 SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
111 SUNXI_FUNCTION(0x4, "spi0"), /* MOSI */
114 SUNXI_FUNCTION(0x0, "gpio_in"),
115 SUNXI_FUNCTION(0x1, "gpio_out"),
116 SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */
117 SUNXI_FUNCTION(0x4, "spi0"), /* CS0 */
120 SUNXI_FUNCTION(0x0, "gpio_in"),
121 SUNXI_FUNCTION(0x1, "gpio_out"),
122 SUNXI_FUNCTION(0x2, "nand0"), /* CE0 */
123 SUNXI_FUNCTION(0x4, "spi0"), /* MISO */
126 SUNXI_FUNCTION(0x0, "gpio_in"),
127 SUNXI_FUNCTION(0x1, "gpio_out"),
128 SUNXI_FUNCTION(0x2, "nand0"), /* RE */
129 SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */
132 SUNXI_FUNCTION(0x0, "gpio_in"),
133 SUNXI_FUNCTION(0x1, "gpio_out"),
134 SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
135 SUNXI_FUNCTION(0x3, "mmc2"), /* CMD */
138 SUNXI_FUNCTION(0x0, "gpio_in"),
139 SUNXI_FUNCTION(0x1, "gpio_out"),
140 SUNXI_FUNCTION(0x2, "nand0"), /* RB1 */
141 SUNXI_FUNCTION(0x4, "spi0"), /* CS1 */
144 SUNXI_FUNCTION(0x0, "gpio_in"),
145 SUNXI_FUNCTION(0x1, "gpio_out"),
146 SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
147 SUNXI_FUNCTION(0x3, "mmc2"), /* D3 */
150 SUNXI_FUNCTION(0x0, "gpio_in"),
151 SUNXI_FUNCTION(0x1, "gpio_out"),
152 SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
153 SUNXI_FUNCTION(0x3, "mmc2"), /* D4 */
156 SUNXI_FUNCTION(0x0, "gpio_in"),
157 SUNXI_FUNCTION(0x1, "gpio_out"),
158 SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
159 SUNXI_FUNCTION(0x3, "mmc2"), /* D0 */
162 SUNXI_FUNCTION(0x0, "gpio_in"),
163 SUNXI_FUNCTION(0x1, "gpio_out"),
164 SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
165 SUNXI_FUNCTION(0x3, "mmc2"), /* D5 */
168 SUNXI_FUNCTION(0x0, "gpio_in"),
169 SUNXI_FUNCTION(0x1, "gpio_out"),
170 SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
171 SUNXI_FUNCTION(0x4, "spi0"), /* CLK */
174 SUNXI_FUNCTION(0x0, "gpio_in"),
175 SUNXI_FUNCTION(0x1, "gpio_out"),
176 SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
177 SUNXI_FUNCTION(0x3, "mmc2"), /* D1 */
180 SUNXI_FUNCTION(0x0, "gpio_in"),
181 SUNXI_FUNCTION(0x1, "gpio_out"),
182 SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
183 SUNXI_FUNCTION(0x3, "mmc2"), /* D6 */
186 SUNXI_FUNCTION(0x0, "gpio_in"),
187 SUNXI_FUNCTION(0x1, "gpio_out"),
188 SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
189 SUNXI_FUNCTION(0x3, "mmc2"), /* D2 */
190 SUNXI_FUNCTION(0x4, "spi0"), /* WP */
193 SUNXI_FUNCTION(0x0, "gpio_in"),
194 SUNXI_FUNCTION(0x1, "gpio_out"),
195 SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
196 SUNXI_FUNCTION(0x3, "mmc2"), /* D7 */
197 SUNXI_FUNCTION(0x4, "spi0"), /* HOLD */
201 SUNXI_FUNCTION(0x0, "gpio_in"),
202 SUNXI_FUNCTION(0x1, "gpio_out"),
203 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
204 SUNXI_FUNCTION(0x3, "lvds0"), /* D0P */
205 SUNXI_FUNCTION(0x4, "dsi0"), /* DP0 */
208 SUNXI_FUNCTION(0x0, "gpio_in"),
209 SUNXI_FUNCTION(0x1, "gpio_out"),
210 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
211 SUNXI_FUNCTION(0x3, "lvds0"), /* D0N */
212 SUNXI_FUNCTION(0x4, "dsi0"), /* DM0 */
215 SUNXI_FUNCTION(0x0, "gpio_in"),
216 SUNXI_FUNCTION(0x1, "gpio_out"),
217 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
218 SUNXI_FUNCTION(0x3, "lvds0"), /* D1P */
219 SUNXI_FUNCTION(0x4, "dsi0"), /* DP1 */
222 SUNXI_FUNCTION(0x0, "gpio_in"),
223 SUNXI_FUNCTION(0x1, "gpio_out"),
224 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
225 SUNXI_FUNCTION(0x3, "lvds0"), /* D1N */
226 SUNXI_FUNCTION(0x4, "dsi0"), /* DM1 */
229 SUNXI_FUNCTION(0x0, "gpio_in"),
230 SUNXI_FUNCTION(0x1, "gpio_out"),
231 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
232 SUNXI_FUNCTION(0x3, "lvds0"), /* D2P */
233 SUNXI_FUNCTION(0x4, "dsi0"), /* CKP */
236 SUNXI_FUNCTION(0x0, "gpio_in"),
237 SUNXI_FUNCTION(0x1, "gpio_out"),
238 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
239 SUNXI_FUNCTION(0x3, "lvds0"), /* D2N */
240 SUNXI_FUNCTION(0x4, "dsi0"), /* CKM */
243 SUNXI_FUNCTION(0x0, "gpio_in"),
244 SUNXI_FUNCTION(0x1, "gpio_out"),
245 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
246 SUNXI_FUNCTION(0x3, "lvds0"), /* CKP */
247 SUNXI_FUNCTION(0x4, "dsi0"), /* DP2 */
250 SUNXI_FUNCTION(0x0, "gpio_in"),
251 SUNXI_FUNCTION(0x1, "gpio_out"),
252 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
253 SUNXI_FUNCTION(0x3, "lvds0"), /* CKN */
254 SUNXI_FUNCTION(0x4, "dsi0"), /* DM2 */
257 SUNXI_FUNCTION(0x0, "gpio_in"),
258 SUNXI_FUNCTION(0x1, "gpio_out"),
259 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
260 SUNXI_FUNCTION(0x4, "dsi0"), /* DP3 */
263 SUNXI_FUNCTION(0x0, "gpio_in"),
264 SUNXI_FUNCTION(0x1, "gpio_out"),
265 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
266 SUNXI_FUNCTION(0x4, "dsi0"), /* DM3 */
269 SUNXI_FUNCTION(0x0, "gpio_in"),
270 SUNXI_FUNCTION(0x1, "gpio_out"),
271 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
272 SUNXI_FUNCTION(0x4, "spi1"), /* CS */
275 SUNXI_FUNCTION(0x0, "gpio_in"),
276 SUNXI_FUNCTION(0x1, "gpio_out"),
277 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
278 SUNXI_FUNCTION(0x4, "spi1"), /* CLK */
281 SUNXI_FUNCTION(0x0, "gpio_in"),
282 SUNXI_FUNCTION(0x1, "gpio_out"),
283 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
284 SUNXI_FUNCTION(0x4, "spi1"), /* MOSI */
287 SUNXI_FUNCTION(0x0, "gpio_in"),
288 SUNXI_FUNCTION(0x1, "gpio_out"),
289 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
290 SUNXI_FUNCTION(0x4, "spi1"), /* MISO */
293 SUNXI_FUNCTION(0x0, "gpio_in"),
294 SUNXI_FUNCTION(0x1, "gpio_out"),
295 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
296 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
299 SUNXI_FUNCTION(0x0, "gpio_in"),
300 SUNXI_FUNCTION(0x1, "gpio_out"),
301 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
302 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
305 SUNXI_FUNCTION(0x0, "gpio_in"),
306 SUNXI_FUNCTION(0x1, "gpio_out"),
307 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
308 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
311 SUNXI_FUNCTION(0x0, "gpio_in"),
312 SUNXI_FUNCTION(0x1, "gpio_out"),
313 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
314 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
317 SUNXI_FUNCTION(0x0, "gpio_in"),
318 SUNXI_FUNCTION(0x1, "gpio_out"),
319 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
320 SUNXI_FUNCTION(0x4, "uart4"), /* TX */
323 SUNXI_FUNCTION(0x0, "gpio_in"),
324 SUNXI_FUNCTION(0x1, "gpio_out"),
325 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
326 SUNXI_FUNCTION(0x4, "uart4"), /* RX */
329 SUNXI_FUNCTION(0x0, "gpio_in"),
330 SUNXI_FUNCTION(0x1, "gpio_out"),
331 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
332 SUNXI_FUNCTION(0x3, "pwm2"),
333 SUNXI_FUNCTION(0x4, "uart4"), /* RTS */
336 SUNXI_FUNCTION(0x0, "gpio_in"),
337 SUNXI_FUNCTION(0x1, "gpio_out"),
338 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
339 SUNXI_FUNCTION(0x3, "pwm3"),
340 SUNXI_FUNCTION(0x4, "uart4"), /* CTS */
343 SUNXI_FUNCTION(0x0, "gpio_in"),
344 SUNXI_FUNCTION(0x1, "gpio_out"),
345 SUNXI_FUNCTION(0x2, "pwm1"),
346 SUNXI_FUNCTION(0x4, "i2c0"), /* SCK */
349 SUNXI_FUNCTION(0x0, "gpio_in"),
350 SUNXI_FUNCTION(0x1, "gpio_out"),
351 SUNXI_FUNCTION(0x2, "pwm0"),
352 SUNXI_FUNCTION(0x4, "i2c0"), /* SDA */
356 SUNXI_FUNCTION(0x0, "gpio_in"),
357 SUNXI_FUNCTION(0x1, "gpio_out"),
358 SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
361 SUNXI_FUNCTION(0x0, "gpio_in"),
362 SUNXI_FUNCTION(0x1, "gpio_out"),
363 SUNXI_FUNCTION(0x2, "i2c2"), /* SCK */
366 SUNXI_FUNCTION(0x0, "gpio_in"),
367 SUNXI_FUNCTION(0x1, "gpio_out"),
368 SUNXI_FUNCTION(0x2, "i2c2"), /* SDA */
371 SUNXI_FUNCTION(0x0, "gpio_in"),
372 SUNXI_FUNCTION(0x1, "gpio_out"),
373 SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */
376 SUNXI_FUNCTION(0x0, "gpio_in"),
377 SUNXI_FUNCTION(0x1, "gpio_out"),
378 SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */
381 SUNXI_FUNCTION(0x0, "gpio_in"),
382 SUNXI_FUNCTION(0x1, "gpio_out"),
383 SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
384 SUNXI_FUNCTION(0x3, "pll"), /* LOCK_DBG */
385 SUNXI_FUNCTION(0x4, "i2s2"), /* MCLK */
386 SUNXI_FUNCTION(0x5, "ledc"), /* LEDC */
389 SUNXI_FUNCTION(0x0, "gpio_in"),
390 SUNXI_FUNCTION(0x1, "gpio_out"),
391 SUNXI_FUNCTION(0x3, "bist0"), /* RESULT0 */
392 SUNXI_FUNCTION(0x4, "i2s2"), /* BCLK */
395 SUNXI_FUNCTION(0x0, "gpio_in"),
396 SUNXI_FUNCTION(0x1, "gpio_out"),
397 SUNXI_FUNCTION(0x2, "csi"), /* SM_VS */
398 SUNXI_FUNCTION(0x3, "bist0"), /* RESULT1 */
399 SUNXI_FUNCTION(0x4, "i2s2"), /* LRCK */
400 SUNXI_FUNCTION(0x5, "tcon0"), /* TRIG */
403 SUNXI_FUNCTION(0x0, "gpio_in"),
404 SUNXI_FUNCTION(0x1, "gpio_out"),
405 SUNXI_FUNCTION(0x3, "bist0"), /* RESULT2 */
406 SUNXI_FUNCTION(0x4, "i2s2"), /* DOUT0 */
409 SUNXI_FUNCTION(0x0, "gpio_in"),
410 SUNXI_FUNCTION(0x1, "gpio_out"),
411 SUNXI_FUNCTION(0x3, "bist0"), /* RESULT3 */
412 SUNXI_FUNCTION(0x4, "i2s2"), /* DIN0 */
416 SUNXI_FUNCTION(0x0, "gpio_in"),
417 SUNXI_FUNCTION(0x1, "gpio_out"),
418 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
419 SUNXI_FUNCTION(0x3, "jtag"), /* MS1 */
420 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* MS_GPU */
423 SUNXI_FUNCTION(0x0, "gpio_in"),
424 SUNXI_FUNCTION(0x1, "gpio_out"),
425 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
426 SUNXI_FUNCTION(0x3, "jtag"), /* DI1 */
427 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DI_GPU */
430 SUNXI_FUNCTION(0x0, "gpio_in"),
431 SUNXI_FUNCTION(0x1, "gpio_out"),
432 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
433 SUNXI_FUNCTION(0x3, "uart0"), /* TX */
436 SUNXI_FUNCTION(0x0, "gpio_in"),
437 SUNXI_FUNCTION(0x1, "gpio_out"),
438 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
439 SUNXI_FUNCTION(0x3, "jtag"), /* DO */
440 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DO_GPU */
443 SUNXI_FUNCTION(0x0, "gpio_in"),
444 SUNXI_FUNCTION(0x1, "gpio_out"),
445 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
446 SUNXI_FUNCTION(0x3, "uart0"), /* RX */
449 SUNXI_FUNCTION(0x0, "gpio_in"),
450 SUNXI_FUNCTION(0x1, "gpio_out"),
451 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
452 SUNXI_FUNCTION(0x3, "jtag"), /* CK */
453 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* CK_GPU */
456 SUNXI_FUNCTION(0x0, "gpio_in"),
457 SUNXI_FUNCTION(0x1, "gpio_out"),
461 SUNXI_FUNCTION(0x0, "gpio_in"),
462 SUNXI_FUNCTION(0x1, "gpio_out"),
463 SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
466 SUNXI_FUNCTION(0x0, "gpio_in"),
467 SUNXI_FUNCTION(0x1, "gpio_out"),
468 SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
471 SUNXI_FUNCTION(0x0, "gpio_in"),
472 SUNXI_FUNCTION(0x1, "gpio_out"),
473 SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
476 SUNXI_FUNCTION(0x0, "gpio_in"),
477 SUNXI_FUNCTION(0x1, "gpio_out"),
478 SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
481 SUNXI_FUNCTION(0x0, "gpio_in"),
482 SUNXI_FUNCTION(0x1, "gpio_out"),
483 SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
486 SUNXI_FUNCTION(0x0, "gpio_in"),
487 SUNXI_FUNCTION(0x1, "gpio_out"),
488 SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
491 SUNXI_FUNCTION(0x0, "gpio_in"),
492 SUNXI_FUNCTION(0x1, "gpio_out"),
493 SUNXI_FUNCTION(0x2, "uart1"), /* TX */
496 SUNXI_FUNCTION(0x0, "gpio_in"),
497 SUNXI_FUNCTION(0x1, "gpio_out"),
498 SUNXI_FUNCTION(0x2, "uart1"), /* RX */
501 SUNXI_FUNCTION(0x0, "gpio_in"),
502 SUNXI_FUNCTION(0x1, "gpio_out"),
503 SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
506 SUNXI_FUNCTION(0x0, "gpio_in"),
507 SUNXI_FUNCTION(0x1, "gpio_out"),
508 SUNXI_FUNCTION(0x2, "uart1"), /* CTS */
509 SUNXI_FUNCTION(0x3, "i2s1"), /* MCLK */
512 SUNXI_FUNCTION(0x0, "gpio_in"),
513 SUNXI_FUNCTION(0x1, "gpio_out"),
514 SUNXI_FUNCTION(0x3, "i2s1"), /* BCLK */
517 SUNXI_FUNCTION(0x0, "gpio_in"),
518 SUNXI_FUNCTION(0x1, "gpio_out"),
519 SUNXI_FUNCTION(0x3, "i2s1"), /* LRCK */
522 SUNXI_FUNCTION(0x0, "gpio_in"),
523 SUNXI_FUNCTION(0x1, "gpio_out"),
524 SUNXI_FUNCTION(0x3, "i2s1_dout0"), /* DOUT0 */
525 SUNXI_FUNCTION(0x4, "i2s1_din1"), /* DIN1 */
528 SUNXI_FUNCTION(0x0, "gpio_in"),
529 SUNXI_FUNCTION(0x1, "gpio_out"),
530 SUNXI_FUNCTION(0x3, "i2s1_din0"), /* DIN0 */
531 SUNXI_FUNCTION(0x4, "i2s1_dout1"), /* DOUT1 */
535 SUNXI_FUNCTION(0x0, "gpio_in"),
536 SUNXI_FUNCTION(0x1, "gpio_out"),
537 SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */
538 SUNXI_FUNCTION(0x5, "emac0"), /* RXD1 */
541 SUNXI_FUNCTION(0x0, "gpio_in"),
542 SUNXI_FUNCTION(0x1, "gpio_out"),
543 SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */
544 SUNXI_FUNCTION(0x5, "emac0"), /* RXD0 */
547 SUNXI_FUNCTION(0x0, "gpio_in"),
548 SUNXI_FUNCTION(0x1, "gpio_out"),
549 SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
550 SUNXI_FUNCTION(0x5, "emac0"), /* RXCTL */
553 SUNXI_FUNCTION(0x0, "gpio_in"),
554 SUNXI_FUNCTION(0x1, "gpio_out"),
555 SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
556 SUNXI_FUNCTION(0x3, "cir0"), /* OUT */
557 SUNXI_FUNCTION(0x5, "emac0"), /* CLKIN */
560 SUNXI_FUNCTION(0x0, "gpio_in"),
561 SUNXI_FUNCTION(0x1, "gpio_out"),
562 SUNXI_FUNCTION(0x2, "uart3"), /* TX */
563 SUNXI_FUNCTION(0x3, "spi1"), /* CS */
564 SUNXI_FUNCTION(0x5, "emac0"), /* TXD1 */
567 SUNXI_FUNCTION(0x0, "gpio_in"),
568 SUNXI_FUNCTION(0x1, "gpio_out"),
569 SUNXI_FUNCTION(0x2, "uart3"), /* RX */
570 SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
571 SUNXI_FUNCTION(0x4, "ledc"),
572 SUNXI_FUNCTION(0x5, "emac0"), /* TXD0 */
575 SUNXI_FUNCTION(0x0, "gpio_in"),
576 SUNXI_FUNCTION(0x1, "gpio_out"),
577 SUNXI_FUNCTION(0x2, "uart3"), /* RTS */
578 SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
579 SUNXI_FUNCTION(0x5, "emac0"), /* TXCK */
582 SUNXI_FUNCTION(0x0, "gpio_in"),
583 SUNXI_FUNCTION(0x1, "gpio_out"),
584 SUNXI_FUNCTION(0x2, "uart3"), /* CTS */
585 SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
586 SUNXI_FUNCTION(0x4, "spdif"), /* OUT */
587 SUNXI_FUNCTION(0x5, "emac0"), /* TXCTL */
590 SUNXI_FUNCTION(0x0, "gpio_in"),
591 SUNXI_FUNCTION(0x1, "gpio_out"),
592 SUNXI_FUNCTION(0x2, "dmic"), /* CLK */
593 SUNXI_FUNCTION(0x3, "spi2"), /* CS */
594 SUNXI_FUNCTION(0x4, "i2s2"), /* MCLK */
595 SUNXI_FUNCTION(0x5, "i2s2_din2"), /* DIN2 */
598 SUNXI_FUNCTION(0x0, "gpio_in"),
599 SUNXI_FUNCTION(0x1, "gpio_out"),
600 SUNXI_FUNCTION(0x2, "dmic"), /* DATA0 */
601 SUNXI_FUNCTION(0x3, "spi2"), /* CLK */
602 SUNXI_FUNCTION(0x4, "i2s2"), /* BCLK */
603 SUNXI_FUNCTION(0x5, "emac0"), /* MDC */
606 SUNXI_FUNCTION(0x0, "gpio_in"),
607 SUNXI_FUNCTION(0x1, "gpio_out"),
608 SUNXI_FUNCTION(0x2, "dmic"), /* DATA1 */
609 SUNXI_FUNCTION(0x3, "spi2"), /* MOSI */
610 SUNXI_FUNCTION(0x4, "i2s2"), /* LRCK */
611 SUNXI_FUNCTION(0x5, "emac0"), /* MDIO */
614 SUNXI_FUNCTION(0x0, "gpio_in"),
615 SUNXI_FUNCTION(0x1, "gpio_out"),
616 SUNXI_FUNCTION(0x2, "dmic"), /* DATA2 */
617 SUNXI_FUNCTION(0x3, "spi2"), /* MISO */
618 SUNXI_FUNCTION(0x4, "i2s2_dout0"), /* DOUT0 */
619 SUNXI_FUNCTION(0x5, "i2s2_din1"), /* DIN1 */
622 SUNXI_FUNCTION(0x0, "gpio_in"),
623 SUNXI_FUNCTION(0x1, "gpio_out"),
624 SUNXI_FUNCTION(0x2, "dmic"), /* DATA3 */
625 SUNXI_FUNCTION(0x3, "i2c3"), /* SCK */
626 SUNXI_FUNCTION(0x4, "i2s2_din0"), /* DIN0 */
627 SUNXI_FUNCTION(0x5, "i2s2_dout1"), /* DOUT1 */
630 SUNXI_FUNCTION(0x0, "gpio_in"),
631 SUNXI_FUNCTION(0x1, "gpio_out"),
632 SUNXI_FUNCTION(0x3, "i2c3"), /* SCK */
633 SUNXI_FUNCTION(0x4, "i2s3"), /* MCLK */
634 SUNXI_FUNCTION(0x5, "emac0"), /* EPHY */
637 SUNXI_FUNCTION(0x0, "gpio_in"),
638 SUNXI_FUNCTION(0x1, "gpio_out"),
639 SUNXI_FUNCTION(0x4, "i2s3"), /* BCLK */
640 SUNXI_FUNCTION(0x5, "emac0"), /* RXD3 */
643 SUNXI_FUNCTION(0x0, "gpio_in"),
644 SUNXI_FUNCTION(0x1, "gpio_out"),
645 SUNXI_FUNCTION(0x4, "i2s3"), /* LRCK */
646 SUNXI_FUNCTION(0x5, "emac0"), /* RXD2 */
649 SUNXI_FUNCTION(0x0, "gpio_in"),
650 SUNXI_FUNCTION(0x1, "gpio_out"),
651 SUNXI_FUNCTION(0x3, "i2s3_dout0"), /* DOUT0 */
652 SUNXI_FUNCTION(0x4, "i2s3_din1"), /* DIN1 */
653 SUNXI_FUNCTION(0x5, "emac0"), /* RXCK */
656 SUNXI_FUNCTION(0x0, "gpio_in"),
657 SUNXI_FUNCTION(0x1, "gpio_out"),
658 SUNXI_FUNCTION(0x3, "i2s3_dout1"), /* DOUT1 */
659 SUNXI_FUNCTION(0x4, "i2s3_din0"), /* DIN0 */
660 SUNXI_FUNCTION(0x5, "emac0"), /* TXD3 */
663 SUNXI_FUNCTION(0x0, "gpio_in"),
664 SUNXI_FUNCTION(0x1, "gpio_out"),
665 SUNXI_FUNCTION(0x2, "cir0"), /* OUT */
666 SUNXI_FUNCTION(0x3, "i2s3_dout2"), /* DOUT2 */
667 SUNXI_FUNCTION(0x4, "i2s3_din2"), /* DIN2 */
668 SUNXI_FUNCTION(0x5, "emac0"), /* TXD2 */
671 SUNXI_FUNCTION(0x0, "gpio_in"),
672 SUNXI_FUNCTION(0x1, "gpio_out"),
673 SUNXI_FUNCTION(0x2, "cir0"), /* IN */
674 SUNXI_FUNCTION(0x3, "i2s3_dout3"), /* DOUT3 */
675 SUNXI_FUNCTION(0x4, "i2s3_din3"), /* DIN3 */
676 SUNXI_FUNCTION(0x5, "ledc"),