21 #define SUN6I_DPHY_GCTL_LANE_NUM(n)		((((n) - 1) & 3) << 4)  argument
36 #define SUN6I_DPHY_TX_TIME0_HS_TRAIL(n)		(((n) & 0xff) << 24)  argument
37 #define SUN6I_DPHY_TX_TIME0_HS_PREPARE(n)	(((n) & 0xff) << 16)  argument
38 #define SUN6I_DPHY_TX_TIME0_LP_CLK_DIV(n)	((n) & 0xff)  argument
41 #define SUN6I_DPHY_TX_TIME1_CLK_POST(n)		(((n) & 0xff) << 24)  argument
42 #define SUN6I_DPHY_TX_TIME1_CLK_PRE(n)		(((n) & 0xff) << 16)  argument
43 #define SUN6I_DPHY_TX_TIME1_CLK_ZERO(n)		(((n) & 0xff) << 8)  argument
44 #define SUN6I_DPHY_TX_TIME1_CLK_PREPARE(n)	((n) & 0xff)  argument
47 #define SUN6I_DPHY_TX_TIME2_CLK_TRAIL(n)	((n) & 0xff)  argument
52 #define SUN6I_DPHY_TX_TIME4_HS_TX_ANA1(n)	(((n) & 0xff) << 8)  argument
53 #define SUN6I_DPHY_TX_TIME4_HS_TX_ANA0(n)	((n) & 0xff)  argument
56 #define SUN6I_DPHY_RX_TIME0_HS_RX_SYNC(n)	(((n) & 0xff) << 24)  argument
57 #define SUN6I_DPHY_RX_TIME0_HS_RX_CLK_MISS(n)	(((n) & 0xff) << 16)  argument
58 #define SUN6I_DPHY_RX_TIME0_LP_RX(n)		(((n) & 0xff) << 8)  argument
61 #define SUN6I_DPHY_RX_TIME1_RX_DLY(n)		(((n) & 0xfff) << 20)  argument
62 #define SUN6I_DPHY_RX_TIME1_LP_RX_ULPS_WP(n)	((n) & 0xfffff)  argument
65 #define SUN6I_DPHY_RX_TIME2_HS_RX_ANA1(n)	(((n) & 0xff) << 8)  argument
66 #define SUN6I_DPHY_RX_TIME2_HS_RX_ANA0(n)	((n) & 0xff)  argument
69 #define SUN6I_DPHY_RX_TIME3_LPRST_DLY(n)	(((n) & 0xffff) << 16)  argument
74 #define SUN6I_DPHY_ANA0_REG_DMPD(n)		(((n) & 0xf) << 24)  argument
75 #define SUN6I_DPHY_ANA0_REG_SLV(n)		(((n) & 7) << 12)  argument
76 #define SUN6I_DPHY_ANA0_REG_DEN(n)		(((n) & 0xf) << 8)  argument
77 #define SUN6I_DPHY_ANA0_REG_SFB(n)		(((n) & 3) << 2)  argument
81 #define SUN6I_DPHY_ANA1_REG_CSMPS(n)		(((n) & 3) << 28)  argument
82 #define SUN6I_DPHY_ANA1_REG_SVTT(n)		(((n) & 0xf) << 24)  argument
85 #define SUN6I_DPHY_ANA2_EN_P2S_CPU(n)		(((n) & 0xf) << 24)  argument
91 #define SUN6I_DPHY_ANA3_EN_VTTD(n)		(((n) & 0xf) << 28)  argument
101 #define SUN6I_DPHY_ANA4_REG_DMPLVD(n)		(((n) & 0xf) << 20)  argument
102 #define SUN6I_DPHY_ANA4_REG_CKDV(n)		(((n) & 0x1f) << 12)  argument
103 #define SUN6I_DPHY_ANA4_REG_TMSC(n)		(((n) & 3) << 10)  argument
104 #define SUN6I_DPHY_ANA4_REG_TMSD(n)		(((n) & 3) << 8)  argument
105 #define SUN6I_DPHY_ANA4_REG_TXDNSC(n)		(((n) & 3) << 6)  argument
106 #define SUN6I_DPHY_ANA4_REG_TXDNSD(n)		(((n) & 3) << 4)  argument
107 #define SUN6I_DPHY_ANA4_REG_TXPUSC(n)		(((n) & 3) << 2)  argument
108 #define SUN6I_DPHY_ANA4_REG_TXPUSD(n)		((n) & 3)  argument