24 	if (!desc->pci.msi_attrib.can_mask)  in pci_msi_update_mask()
60 	if (desc->pci.msi_attrib.can_mask)  in pci_msix_write_vector_ctrl()
80 	if (desc->pci.msi_attrib.is_msix)  in __pci_msi_mask_desc()
88 	if (desc->pci.msi_attrib.is_msix)  in __pci_msi_unmask_desc()
124 	if (entry->pci.msi_attrib.is_msix) {  in __pci_read_msi_msg()
127 		if (WARN_ON_ONCE(entry->pci.msi_attrib.is_virtual))  in __pci_read_msi_msg()
139 		if (entry->pci.msi_attrib.is_64) {  in __pci_read_msi_msg()
157 	} else if (entry->pci.msi_attrib.is_msix) {  in __pci_write_msi_msg()
162 		if (entry->pci.msi_attrib.is_virtual)  in __pci_write_msi_msg()
191 		msgctl |= entry->pci.msi_attrib.multiple << 4;  in __pci_write_msi_msg()
196 		if (entry->pci.msi_attrib.is_64) {  in __pci_write_msi_msg()
279 	control |= (entry->pci.msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE;  in __pci_restore_msi_state()
382 	desc.pci.msi_attrib.is_64	= !!(control & PCI_MSI_FLAGS_64BIT);  in msi_setup_msi_desc()
383 	desc.pci.msi_attrib.can_mask	= !!(control & PCI_MSI_FLAGS_MASKBIT);  in msi_setup_msi_desc()
384 	desc.pci.msi_attrib.default_irq	= dev->irq;  in msi_setup_msi_desc()
385 	desc.pci.msi_attrib.multi_cap	= (control & PCI_MSI_FLAGS_QMASK) >> 1;  in msi_setup_msi_desc()
386 	desc.pci.msi_attrib.multiple	= ilog2(__roundup_pow_of_two(nvec));  in msi_setup_msi_desc()
395 	if (desc.pci.msi_attrib.can_mask)  in msi_setup_msi_desc()
517 	desc.pci.msi_attrib.is_msix	= 1;  in msix_setup_msi_descs()
518 	desc.pci.msi_attrib.is_64	= 1;  in msix_setup_msi_descs()
519 	desc.pci.msi_attrib.default_irq	= dev->irq;  in msix_setup_msi_descs()
525 		desc.pci.msi_attrib.is_virtual = desc.msi_index >= vec_count;  in msix_setup_msi_descs()
526 		desc.pci.msi_attrib.can_mask = !pci_msi_ignore_mask &&  in msix_setup_msi_descs()
527 					       !desc.pci.msi_attrib.is_virtual;  in msix_setup_msi_descs()
529 		if (!desc.pci.msi_attrib.can_mask) {  in msix_setup_msi_descs()
759 	dev->irq = desc->pci.msi_attrib.default_irq;  in pci_msi_shutdown()