56 				      rtw8852a_backup_rf_regs[i], RFREG_MASK);  in _rfk_backup_rf_reg()
84 			       RFREG_MASK, backup_rf_reg_val[i]);  in _rfk_restore_rf_reg()
505 	rf0_0 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK);  in _dac_cal()
506 	rf1_0 = rtw89_read_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK);  in _dac_cal()
510 	rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x30001);  in _dac_cal()
511 	rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, 0x30001);  in _dac_cal()
517 	rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x40001);  in _dac_cal()
518 	rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, 0x40001);  in _dac_cal()
519 	rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT, RFREG_MASK, 0x0);  in _dac_cal()
520 	rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT, RFREG_MASK, 0x0);  in _dac_cal()
526 	rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, rf0_0);  in _dac_cal()
527 	rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, rf1_0);  in _dac_cal()
774 	tmp = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK);  in _iqk_rxk_setting()
775 	rtw89_write_rf(rtwdev, path, RR_RSV4, RFREG_MASK, tmp);  in _iqk_rxk_setting()
920 		rf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK);  in _rxk_group_sel()
983 	rf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK);  in _iqk_nbrxk()
1152 	rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x2);  in _lok_res_table()
1154 		rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, 0x0);  in _lok_res_table()
1156 		rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, 0x1);  in _lok_res_table()
1157 	rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, ibias);  in _lok_res_table()
1158 	rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x0);  in _lok_res_table()
1168 	tmp = rtw89_read_rf(rtwdev, path, RR_TXMO, RFREG_MASK);  in _lok_finetune_check()
1203 	rf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK);  in _iqk_lok()
1248 		rtw89_write_rf(rtwdev, path, RR_RSV2, RFREG_MASK, 0x80200);  in _iqk_txk_setting()
1249 		rtw89_write_rf(rtwdev, path, RR_DTXLOK, RFREG_MASK, 0x80200);  in _iqk_txk_setting()
1250 		rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK,  in _iqk_txk_setting()
1262 		rtw89_write_rf(rtwdev, path, RR_RSV2, RFREG_MASK, 0x80200);  in _iqk_txk_setting()
1263 		rtw89_write_rf(rtwdev, path, RR_DTXLOK, RFREG_MASK, 0x80200);  in _iqk_txk_setting()
1264 		rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, 0x1);  in _iqk_txk_setting()
1265 		rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, 0x0);  in _iqk_txk_setting()
1266 		rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK,  in _iqk_txk_setting()
1379 	reg_rf18 = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK);  in _iqk_get_ch_info()
1569 	rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK);  in _rck()
1575 		    rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK));  in _rck()
1578 	rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, 0x00240);  in _rck()
1586 	rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, rck_val);  in _rck()
1594 	rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5);  in _rck()
1598 		    rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK),  in _rck()
1599 		    rtw89_read_rf(rtwdev, path, RR_RCKS, RFREG_MASK),  in _rck()
1600 		    rtw89_read_rf(rtwdev, path, RR_RCKO, RFREG_MASK));  in _rck()
1750 		rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK);  in _rx_dck()
1764 		rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5);  in _rx_dck()
2009 	rtw89_write_rf(rtwdev, path, RR_RSV4, RFREG_MASK,  in _dpk_lbk_rxiqk()
2010 		       rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK));  in _dpk_lbk_rxiqk()
2058 	rtw89_write_rf(rtwdev, path, RR_MODOPT, RFREG_MASK, txagc_ori);  in _dpk_set_tx_pwr()
2085 		    rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK),  in _dpk_rf_setting()
2086 		    rtw89_read_rf(rtwdev, path, RR_MODOPT, RFREG_MASK),  in _dpk_rf_setting()
2087 		    rtw89_read_rf(rtwdev, path, RR_BTC, RFREG_MASK));  in _dpk_rf_setting()
2288 	txagc = (u8)rtw89_read_rf(rtwdev, path, RR_MODOPT, RFREG_MASK);  in _dpk_set_offset()
2297 	rtw89_write_rf(rtwdev, path, RR_MODOPT, RFREG_MASK, txagc);  in _dpk_set_offset()