Lines Matching refs:rtw_write32_set

71 	rtw_write32_set(rtwdev, REG_3WIRE, BIT_3WIRE_TX_EN | BIT_3WIRE_RX_EN);  in rtw8822c_header_file_init()
72 rtw_write32_set(rtwdev, REG_3WIRE, BIT_3WIRE_PI_ON); in rtw8822c_header_file_init()
73 rtw_write32_set(rtwdev, REG_3WIRE2, BIT_3WIRE_TX_EN | BIT_3WIRE_RX_EN); in rtw8822c_header_file_init()
74 rtw_write32_set(rtwdev, REG_3WIRE2, BIT_3WIRE_PI_ON); in rtw8822c_header_file_init()
79 rtw_write32_set(rtwdev, REG_ENCCK, BIT_CCK_OFDM_BLK_EN); in rtw8822c_header_file_init()
717 rtw_write32_set(rtwdev, 0x1830, BIT(30)); in rtw8822c_dac_cal_backup()
718 rtw_write32_set(rtwdev, 0x4130, BIT(30)); in rtw8822c_dac_cal_backup()
730 rtw_write32_set(rtwdev, REG_DCKA_I_0, BIT(19)); in rtw8822c_dac_cal_restore_dck()
736 rtw_write32_set(rtwdev, REG_DCKA_Q_0, BIT(19)); in rtw8822c_dac_cal_restore_dck()
742 rtw_write32_set(rtwdev, REG_DCKB_I_0, BIT(19)); in rtw8822c_dac_cal_restore_dck()
748 rtw_write32_set(rtwdev, REG_DCKB_Q_0, BIT(19)); in rtw8822c_dac_cal_restore_dck()
1860 rtw_write32_set(rtwdev, REG_WLRF1, BIT_WLRF1_BBRF_EN); in rtw8822c_phy_set_param()
2083 rtw_write32_set(rtwdev, REG_GENERAL_OPTION, BIT_DUMMY_FCS_READY_MASK_EN); in rtw8822c_mac_init()
2254 rtw_write32_set(rtwdev, REG_TXF4, BIT(20)); in rtw8822c_set_channel_bb()
2317 rtw_write32_set(rtwdev, REG_CCKTXONLY, BIT_BB_CCK_CHECK_EN); in rtw8822c_set_channel_bb()
2318 rtw_write32_set(rtwdev, REG_CCK_CHECK, BIT_CHECK_CCK_EN); in rtw8822c_set_channel_bb()
2319 rtw_write32_set(rtwdev, REG_BGCTRL, BITS_RX_IQ_WEIGHT); in rtw8822c_set_channel_bb()
2897 rtw_write32_set(rtwdev, REG_CNT_CTRL, BIT_ALL_CNT_RST); in rtw8822c_false_alarm_statistics()
2899 rtw_write32_set(rtwdev, REG_RX_BREAK, BIT_COM_RX_GCK_EN); in rtw8822c_false_alarm_statistics()
2953 rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_BT_PTA_EN); in rtw8822c_coex_cfg_init()
2954 rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_PO_BT_PTA_PINS); in rtw8822c_coex_cfg_init()
4533 rtw_write32_set(rtwdev, REG_RD_CTRL, BIT_EDCCA_MSK_CNTDOWN_EN); in rtw8822c_adaptivity_init()