Lines Matching refs:offload_assist
46 u16 offload_assist = 0; in iwl_mvm_tx_csum_pre_bz() local
99 offload_assist |= BIT(TX_CMD_OFFLD_L4_EN); in iwl_mvm_tx_csum_pre_bz()
106 offload_assist |= (4 << TX_CMD_OFFLD_IP_HDR); in iwl_mvm_tx_csum_pre_bz()
111 offload_assist |= BIT(TX_CMD_OFFLD_L3_EN); in iwl_mvm_tx_csum_pre_bz()
130 offload_assist |= mh_len << TX_CMD_OFFLD_MH_SIZE; in iwl_mvm_tx_csum_pre_bz()
135 offload_assist |= BIT(TX_CMD_OFFLD_AMSDU); in iwl_mvm_tx_csum_pre_bz()
138 offload_assist |= BIT(TX_CMD_OFFLD_PAD); in iwl_mvm_tx_csum_pre_bz()
140 return offload_assist; in iwl_mvm_tx_csum_pre_bz()
146 u32 offload_assist = IWL_TX_CMD_OFFLD_BZ_PARTIAL_CSUM; in iwl_mvm_tx_csum_bz() local
150 offload_assist |= u32_encode_bits(hdrlen / 2, in iwl_mvm_tx_csum_bz()
153 offload_assist |= IWL_TX_CMD_OFFLD_BZ_AMSDU; in iwl_mvm_tx_csum_bz()
156 offload_assist |= IWL_TX_CMD_OFFLD_BZ_MH_PAD; in iwl_mvm_tx_csum_bz()
159 return offload_assist; in iwl_mvm_tx_csum_bz()
161 offload_assist |= IWL_TX_CMD_OFFLD_BZ_ENABLE_CSUM | in iwl_mvm_tx_csum_bz()
174 offload_assist |= u32_encode_bits(csum_start, in iwl_mvm_tx_csum_bz()
176 offload_assist |= u32_encode_bits(csum_start + skb->csum_offset, in iwl_mvm_tx_csum_bz()
179 return offload_assist; in iwl_mvm_tx_csum_bz()
289 tx_cmd->offload_assist = in iwl_mvm_set_tx_cmd()
542 u32 offload_assist = iwl_mvm_tx_csum(mvm, skb, in iwl_mvm_set_tx_params() local
545 cmd->offload_assist = cpu_to_le32(offload_assist); in iwl_mvm_set_tx_params()
557 u16 offload_assist = iwl_mvm_tx_csum_pre_bz(mvm, skb, in iwl_mvm_set_tx_params() local
561 cmd->offload_assist = cpu_to_le16(offload_assist); in iwl_mvm_set_tx_params()