53 	struct iwl_fw_runtime *fwrt;  member
529 static int iwl_dbg_tlv_alloc_fragment(struct iwl_fw_runtime *fwrt,  in iwl_dbg_tlv_alloc_fragment()  argument
546 		block = dma_alloc_coherent(fwrt->dev, pages * PAGE_SIZE,  in iwl_dbg_tlv_alloc_fragment()
552 		IWL_WARN(fwrt, "WRT: Failed to allocate fragment size %lu\n",  in iwl_dbg_tlv_alloc_fragment()
568 static int iwl_dbg_tlv_alloc_fragments(struct iwl_fw_runtime *fwrt,  in iwl_dbg_tlv_alloc_fragments()  argument
580 	fw_mon_cfg = &fwrt->trans->dbg.fw_mon_cfg[alloc_id];  in iwl_dbg_tlv_alloc_fragments()
581 	fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];  in iwl_dbg_tlv_alloc_fragments()
589 	if (fwrt->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210) {  in iwl_dbg_tlv_alloc_fragments()
608 		IWL_DEBUG_FW(fwrt,  in iwl_dbg_tlv_alloc_fragments()
612 		pages = iwl_dbg_tlv_alloc_fragment(fwrt, &fw_mon->frags[i],  in iwl_dbg_tlv_alloc_fragments()
619 				iwl_dbg_tlv_fragments_free(fwrt->trans,  in iwl_dbg_tlv_alloc_fragments()
633 static int iwl_dbg_tlv_apply_buffer(struct iwl_fw_runtime *fwrt,  in iwl_dbg_tlv_apply_buffer()  argument
640 	if (!fw_has_capa(&fwrt->fw->ucode_capa,  in iwl_dbg_tlv_apply_buffer()
648 	if (le32_to_cpu(fwrt->trans->dbg.fw_mon_cfg[alloc_id].buf_location) !=  in iwl_dbg_tlv_apply_buffer()
652 	fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];  in iwl_dbg_tlv_apply_buffer()
666 	IWL_DEBUG_FW(fwrt, "WRT: Applying DRAM destination (alloc_id=%u)\n",  in iwl_dbg_tlv_apply_buffer()
694 		ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);  in iwl_dbg_tlv_apply_buffer()
704 static void iwl_dbg_tlv_apply_buffers(struct iwl_fw_runtime *fwrt)  in iwl_dbg_tlv_apply_buffers()  argument
708 	if (fw_has_capa(&fwrt->fw->ucode_capa,  in iwl_dbg_tlv_apply_buffers()
713 		ret = iwl_dbg_tlv_apply_buffer(fwrt, i);  in iwl_dbg_tlv_apply_buffers()
715 			IWL_WARN(fwrt,  in iwl_dbg_tlv_apply_buffers()
721 static int iwl_dbg_tlv_update_dram(struct iwl_fw_runtime *fwrt,  in iwl_dbg_tlv_update_dram()  argument
730 	if (le32_to_cpu(fwrt->trans->dbg.fw_mon_cfg[alloc_id].buf_location) !=  in iwl_dbg_tlv_update_dram()
732 		IWL_DEBUG_FW(fwrt, "DRAM_PATH is not supported alloc_id %u\n", alloc_id);  in iwl_dbg_tlv_update_dram()
736 	fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];  in iwl_dbg_tlv_update_dram()
754 	IWL_DEBUG_FW(fwrt, "WRT: DRAM buffer details alloc_id=%u, num_frags=%u\n",  in iwl_dbg_tlv_update_dram()
763 		IWL_DEBUG_FW(fwrt, "WRT: DRAM fragment details\n");  in iwl_dbg_tlv_update_dram()
764 		IWL_DEBUG_FW(fwrt, "frag=%u, addr=0x%016llx, size=0x%x)\n",  in iwl_dbg_tlv_update_dram()
771 static void iwl_dbg_tlv_update_drams(struct iwl_fw_runtime *fwrt)  in iwl_dbg_tlv_update_drams()  argument
776 		&fwrt->trans->dbg.fw_mon_ini[IWL_FW_INI_ALLOCATION_ID_DBGC1].frags[0];  in iwl_dbg_tlv_update_drams()
784 	if (!fw_has_capa(&fwrt->fw->ucode_capa,  in iwl_dbg_tlv_update_drams()
793 		ret = iwl_dbg_tlv_update_dram(fwrt, i, dram_info);  in iwl_dbg_tlv_update_drams()
797 			IWL_WARN(fwrt,  in iwl_dbg_tlv_update_drams()
803 		IWL_DEBUG_FW(fwrt, "block data after  %08x\n",  in iwl_dbg_tlv_update_drams()
809 static void iwl_dbg_tlv_send_hcmds(struct iwl_fw_runtime *fwrt,  in iwl_dbg_tlv_send_hcmds()  argument
824 		iwl_trans_send_cmd(fwrt->trans, &cmd);  in iwl_dbg_tlv_send_hcmds()
828 static void iwl_dbg_tlv_apply_config(struct iwl_fw_runtime *fwrt,  in iwl_dbg_tlv_apply_config()  argument
842 			if (!iwl_trans_grab_nic_access(fwrt->trans)) {  in iwl_dbg_tlv_apply_config()
843 				IWL_DEBUG_FW(fwrt, "WRT: failed to get nic access\n");  in iwl_dbg_tlv_apply_config()
844 				IWL_DEBUG_FW(fwrt, "WRT: skipping MAC PERIPHERY config\n");  in iwl_dbg_tlv_apply_config()
847 			IWL_DEBUG_FW(fwrt, "WRT:  MAC PERIPHERY config len: len %u\n", len);  in iwl_dbg_tlv_apply_config()
851 				iwl_trans_write_prph(fwrt->trans, address + offset, value);  in iwl_dbg_tlv_apply_config()
853 			iwl_trans_release_nic_access(fwrt->trans);  in iwl_dbg_tlv_apply_config()
860 				iwl_trans_write_mem32(fwrt->trans, address + offset, value);  in iwl_dbg_tlv_apply_config()
861 				IWL_DEBUG_FW(fwrt, "WRT: DEV_MEM: count %u, add: %u val: %u\n",  in iwl_dbg_tlv_apply_config()
870 				iwl_write32(fwrt->trans, address + offset, value);  in iwl_dbg_tlv_apply_config()
871 				IWL_DEBUG_FW(fwrt, "WRT: CSR: count %u, add: %u val: %u\n",  in iwl_dbg_tlv_apply_config()
878 			struct iwl_dram_data *frags = &fwrt->trans->dbg.fw_mon_ini[1].frags[0];  in iwl_dbg_tlv_apply_config()
891 			IWL_DEBUG_FW(fwrt, "WRT: dram_base_addr 0x%016llx, dram_size 0x%x\n",  in iwl_dbg_tlv_apply_config()
893 			IWL_DEBUG_FW(fwrt, "WRT: config_list->addr_offset: %u\n",  in iwl_dbg_tlv_apply_config()
902 				ret = iwl_trans_write_mem(fwrt->trans,  in iwl_dbg_tlv_apply_config()
905 					IWL_ERR(fwrt, "Failed to write dram_info to HW_SMEM\n");  in iwl_dbg_tlv_apply_config()
915 			IWL_DEBUG_FW(fwrt, "WRT: Setting HWM debug token config: %u\n",  in iwl_dbg_tlv_apply_config()
917 			fwrt->trans->dbg.ucode_preset = debug_token_config;  in iwl_dbg_tlv_apply_config()
935 	ret = iwl_fw_dbg_ini_collect(timer_node->fwrt, &dump_data, false);  in iwl_dbg_tlv_periodic_trig_handler()
947 static void iwl_dbg_tlv_set_periodic_trigs(struct iwl_fw_runtime *fwrt)  in iwl_dbg_tlv_set_periodic_trigs()  argument
951 		&fwrt->trans->dbg.time_point[IWL_FW_INI_TIME_POINT_PERIODIC].active_trig_list;  in iwl_dbg_tlv_set_periodic_trigs()
967 			IWL_ERR(fwrt,  in iwl_dbg_tlv_set_periodic_trigs()
973 			IWL_WARN(fwrt,  in iwl_dbg_tlv_set_periodic_trigs()
983 			IWL_ERR(fwrt,  in iwl_dbg_tlv_set_periodic_trigs()
988 		timer_node->fwrt = fwrt;  in iwl_dbg_tlv_set_periodic_trigs()
994 			      &fwrt->trans->dbg.periodic_trig_list);  in iwl_dbg_tlv_set_periodic_trigs()
996 		IWL_DEBUG_FW(fwrt, "WRT: Enabling periodic trigger\n");  in iwl_dbg_tlv_set_periodic_trigs()
1029 static int iwl_dbg_tlv_override_trig_node(struct iwl_fw_runtime *fwrt,  in iwl_dbg_tlv_override_trig_node()  argument
1045 		IWL_DEBUG_FW(fwrt,  in iwl_dbg_tlv_override_trig_node()
1052 		IWL_DEBUG_FW(fwrt,  in iwl_dbg_tlv_override_trig_node()
1065 			IWL_WARN(fwrt,  in iwl_dbg_tlv_override_trig_node()
1083 		IWL_DEBUG_FW(fwrt,  in iwl_dbg_tlv_override_trig_node()
1092 		IWL_DEBUG_FW(fwrt,  in iwl_dbg_tlv_override_trig_node()
1098 		IWL_DEBUG_FW(fwrt,  in iwl_dbg_tlv_override_trig_node()
1109 iwl_dbg_tlv_add_active_trigger(struct iwl_fw_runtime *fwrt,  in iwl_dbg_tlv_add_active_trigger()  argument
1129 		IWL_DEBUG_FW(fwrt, "WRT: Enabling trigger (time point %u)\n",  in iwl_dbg_tlv_add_active_trigger()
1134 	return iwl_dbg_tlv_override_trig_node(fwrt, trig_tlv, match);  in iwl_dbg_tlv_add_active_trigger()
1138 iwl_dbg_tlv_gen_active_trig_list(struct iwl_fw_runtime *fwrt,  in iwl_dbg_tlv_gen_active_trig_list()  argument
1148 		iwl_dbg_tlv_add_active_trigger(fwrt, active_trig_list, tlv);  in iwl_dbg_tlv_gen_active_trig_list()
1152 static bool iwl_dbg_tlv_check_fw_pkt(struct iwl_fw_runtime *fwrt,  in iwl_dbg_tlv_check_fw_pkt()  argument
1179 iwl_dbg_tlv_tp_trigger(struct iwl_fw_runtime *fwrt, bool sync,  in iwl_dbg_tlv_tp_trigger()  argument
1182 		       bool (*data_check)(struct iwl_fw_runtime *fwrt,  in iwl_dbg_tlv_tp_trigger()  argument
1200 			ret = iwl_fw_dbg_ini_collect(fwrt, &dump_data, sync);  in iwl_dbg_tlv_tp_trigger()
1207 			    data_check(fwrt, &dump_data, tp_data,  in iwl_dbg_tlv_tp_trigger()
1209 				ret = iwl_fw_dbg_ini_collect(fwrt, &dump_data, sync);  in iwl_dbg_tlv_tp_trigger()
1217 		fwrt->trans->dbg.restart_required = FALSE;  in iwl_dbg_tlv_tp_trigger()
1218 		IWL_DEBUG_INFO(fwrt, "WRT: tp %d, reset_fw %d\n",  in iwl_dbg_tlv_tp_trigger()
1220 		IWL_DEBUG_INFO(fwrt, "WRT: restart_required %d, last_tp_resetfw %d\n",  in iwl_dbg_tlv_tp_trigger()
1221 			       fwrt->trans->dbg.restart_required,  in iwl_dbg_tlv_tp_trigger()
1222 			       fwrt->trans->dbg.last_tp_resetfw);  in iwl_dbg_tlv_tp_trigger()
1224 		if (fwrt->trans->trans_cfg->device_family ==  in iwl_dbg_tlv_tp_trigger()
1226 			fwrt->trans->dbg.restart_required = TRUE;  in iwl_dbg_tlv_tp_trigger()
1228 			   fwrt->trans->dbg.last_tp_resetfw ==  in iwl_dbg_tlv_tp_trigger()
1230 			fwrt->trans->dbg.restart_required = FALSE;  in iwl_dbg_tlv_tp_trigger()
1231 			fwrt->trans->dbg.last_tp_resetfw = 0xFF;  in iwl_dbg_tlv_tp_trigger()
1232 			IWL_DEBUG_FW(fwrt, "WRT: FW_ASSERT due to reset_fw_mode-no restart\n");  in iwl_dbg_tlv_tp_trigger()
1235 			IWL_DEBUG_INFO(fwrt, "WRT: stop and reload firmware\n");  in iwl_dbg_tlv_tp_trigger()
1236 			fwrt->trans->dbg.restart_required = TRUE;  in iwl_dbg_tlv_tp_trigger()
1239 			IWL_DEBUG_INFO(fwrt, "WRT: stop only and no reload firmware\n");  in iwl_dbg_tlv_tp_trigger()
1240 			fwrt->trans->dbg.restart_required = FALSE;  in iwl_dbg_tlv_tp_trigger()
1241 			fwrt->trans->dbg.last_tp_resetfw =  in iwl_dbg_tlv_tp_trigger()
1245 			IWL_DEBUG_INFO(fwrt,  in iwl_dbg_tlv_tp_trigger()
1248 			IWL_ERR(fwrt, "WRT: wrong resetfw %d\n",  in iwl_dbg_tlv_tp_trigger()
1255 static void iwl_dbg_tlv_init_cfg(struct iwl_fw_runtime *fwrt)  in iwl_dbg_tlv_init_cfg()  argument
1257 	enum iwl_fw_ini_buffer_location *ini_dest = &fwrt->trans->dbg.ini_dest;  in iwl_dbg_tlv_init_cfg()
1264 	IWL_DEBUG_FW(fwrt,  in iwl_dbg_tlv_init_cfg()
1266 		     fwrt->trans->dbg.domains_bitmap);  in iwl_dbg_tlv_init_cfg()
1268 	for (i = 0; i < ARRAY_SIZE(fwrt->trans->dbg.time_point); i++) {  in iwl_dbg_tlv_init_cfg()
1270 			&fwrt->trans->dbg.time_point[i];  in iwl_dbg_tlv_init_cfg()
1272 		iwl_dbg_tlv_gen_active_trig_list(fwrt, tp);  in iwl_dbg_tlv_init_cfg()
1278 			&fwrt->trans->dbg.fw_mon_cfg[i];  in iwl_dbg_tlv_init_cfg()
1292 		ret = iwl_dbg_tlv_alloc_fragments(fwrt, i);  in iwl_dbg_tlv_init_cfg()
1295 			IWL_WARN(fwrt,  in iwl_dbg_tlv_init_cfg()
1305 	for (i = 0; i < ARRAY_SIZE(fwrt->trans->dbg.active_regions) && failed_alloc; i++) {  in iwl_dbg_tlv_init_cfg()
1308 			&fwrt->trans->dbg.active_regions[i];  in iwl_dbg_tlv_init_cfg()
1312 			fwrt->trans->dbg.unsupported_region_msk |= BIT(i);  in iwl_dbg_tlv_init_cfg()
1323 		IWL_DEBUG_FW(fwrt,  in iwl_dbg_tlv_init_cfg()
1328 		fwrt->trans->dbg.unsupported_region_msk |= BIT(i);  in iwl_dbg_tlv_init_cfg()
1335 void _iwl_dbg_tlv_time_point(struct iwl_fw_runtime *fwrt,  in _iwl_dbg_tlv_time_point()  argument
1342 	if (!iwl_trans_dbg_ini_valid(fwrt->trans) ||  in _iwl_dbg_tlv_time_point()
1347 	hcmd_list = &fwrt->trans->dbg.time_point[tp_id].hcmd_list;  in _iwl_dbg_tlv_time_point()
1348 	trig_list = &fwrt->trans->dbg.time_point[tp_id].active_trig_list;  in _iwl_dbg_tlv_time_point()
1349 	conf_list = &fwrt->trans->dbg.time_point[tp_id].config_list;  in _iwl_dbg_tlv_time_point()
1353 		iwl_dbg_tlv_init_cfg(fwrt);  in _iwl_dbg_tlv_time_point()
1354 		iwl_dbg_tlv_apply_config(fwrt, conf_list);  in _iwl_dbg_tlv_time_point()
1355 		iwl_dbg_tlv_update_drams(fwrt);  in _iwl_dbg_tlv_time_point()
1356 		iwl_dbg_tlv_tp_trigger(fwrt, sync, trig_list, tp_data, NULL);  in _iwl_dbg_tlv_time_point()
1359 		iwl_dbg_tlv_apply_buffers(fwrt);  in _iwl_dbg_tlv_time_point()
1360 		iwl_dbg_tlv_send_hcmds(fwrt, hcmd_list);  in _iwl_dbg_tlv_time_point()
1361 		iwl_dbg_tlv_apply_config(fwrt, conf_list);  in _iwl_dbg_tlv_time_point()
1362 		iwl_dbg_tlv_tp_trigger(fwrt, sync, trig_list, tp_data, NULL);  in _iwl_dbg_tlv_time_point()
1365 		iwl_dbg_tlv_set_periodic_trigs(fwrt);  in _iwl_dbg_tlv_time_point()
1366 		iwl_dbg_tlv_send_hcmds(fwrt, hcmd_list);  in _iwl_dbg_tlv_time_point()
1371 		iwl_dbg_tlv_send_hcmds(fwrt, hcmd_list);  in _iwl_dbg_tlv_time_point()
1372 		iwl_dbg_tlv_apply_config(fwrt, conf_list);  in _iwl_dbg_tlv_time_point()
1373 		iwl_dbg_tlv_tp_trigger(fwrt, sync, trig_list, tp_data,  in _iwl_dbg_tlv_time_point()
1377 		iwl_dbg_tlv_send_hcmds(fwrt, hcmd_list);  in _iwl_dbg_tlv_time_point()
1378 		iwl_dbg_tlv_apply_config(fwrt, conf_list);  in _iwl_dbg_tlv_time_point()
1379 		iwl_dbg_tlv_tp_trigger(fwrt, sync, trig_list, tp_data, NULL);  in _iwl_dbg_tlv_time_point()