Lines Matching refs:u16
248 u16 crsminpwrthld_40_stored;
249 u16 crsminpwrthld_20L_stored;
250 u16 crsminpwrthld_20U_stored;
251 u16 init_gain_code_core1_stored;
252 u16 init_gain_code_core2_stored;
253 u16 init_gain_codeb_core1_stored;
254 u16 init_gain_codeb_core2_stored;
255 u16 init_gain_table_stored[4];
257 u16 clip1_hi_gain_code_core1_stored;
258 u16 clip1_hi_gain_code_core2_stored;
259 u16 clip1_hi_gain_codeb_core1_stored;
260 u16 clip1_hi_gain_codeb_core2_stored;
261 u16 nb_clip_thresh_core1_stored;
262 u16 nb_clip_thresh_core2_stored;
263 u16 init_ofdmlna2gainchange_stored[4];
264 u16 init_ccklna2gainchange_stored[4];
265 u16 clip1_lo_gain_code_core1_stored;
266 u16 clip1_lo_gain_code_core2_stored;
267 u16 clip1_lo_gain_codeb_core1_stored;
268 u16 clip1_lo_gain_codeb_core2_stored;
269 u16 w1_clip_thresh_core1_stored;
270 u16 w1_clip_thresh_core2_stored;
271 u16 radio_2056_core1_rssi_gain_stored;
272 u16 radio_2056_core2_rssi_gain_stored;
273 u16 energy_drop_timeout_len_stored;
275 u16 ed_crs40_assertthld0_stored;
276 u16 ed_crs40_assertthld1_stored;
277 u16 ed_crs40_deassertthld0_stored;
278 u16 ed_crs40_deassertthld1_stored;
279 u16 ed_crs20L_assertthld0_stored;
280 u16 ed_crs20L_assertthld1_stored;
281 u16 ed_crs20L_deassertthld0_stored;
282 u16 ed_crs20L_deassertthld1_stored;
283 u16 ed_crs20U_assertthld0_stored;
284 u16 ed_crs20U_assertthld1_stored;
285 u16 ed_crs20U_deassertthld0_stored;
286 u16 ed_crs20U_deassertthld1_stored;
288 u16 badplcp_ma;
289 u16 badplcp_ma_previous;
290 u16 badplcp_ma_total;
291 u16 badplcp_ma_list[MA_WINDOW_SZ];
296 u16 init_gain_core1;
297 u16 init_gain_core2;
298 u16 init_gainb_core1;
299 u16 init_gainb_core2;
300 u16 init_gain_rfseq[4];
302 u16 crsminpwr0;
303 u16 crsminpwrl0;
304 u16 crsminpwru0;
308 u16 radio_2057_core1_rssi_wb1a_gc_stored;
309 u16 radio_2057_core2_rssi_wb1a_gc_stored;
310 u16 radio_2057_core1_rssi_wb1g_gc_stored;
311 u16 radio_2057_core2_rssi_wb1g_gc_stored;
312 u16 radio_2057_core1_rssi_wb2_gc_stored;
313 u16 radio_2057_core2_rssi_wb2_gc_stored;
314 u16 radio_2057_core1_rssi_nb_gc_stored;
315 u16 radio_2057_core2_rssi_nb_gc_stored;
319 u16 rc_cal_ovr;
320 u16 phycrsth1;
321 u16 phycrsth2;
322 u16 init_n1p1_gain;
323 u16 p1_p2_gain;
324 u16 n1_n2_gain;
325 u16 n1_p1_gain;
326 u16 div_search_gain;
327 u16 div_p1_p2_gain;
328 u16 div_search_gn_change;
329 u16 table_7_2;
330 u16 table_7_3;
331 u16 cckshbits_gnref;
332 u16 clip_thresh;
333 u16 clip2_thresh;
334 u16 clip3_thresh;
335 u16 clip_p2_thresh;
336 u16 clip_pwdn_thresh;
337 u16 clip_n1p1_thresh;
338 u16 clip_n1_pwdn_thresh;
339 u16 bbconfig;
340 u16 cthr_sthr_shdin;
341 u16 energy;
342 u16 clip_p1_p2_thresh;
343 u16 threshold;
344 u16 reg15;
345 u16 reg16;
346 u16 reg17;
347 u16 div_srch_idx;
348 u16 div_srch_p1_p2;
349 u16 div_srch_gn_back;
350 u16 ant_dwell;
351 u16 ant_wr_settle;
370 u16 AfectrlOverride;
371 u16 AfeCtrlDacGain;
372 u16 rad_gain;
374 u16 iqcomp_a;
375 u16 iqcomp_b;
376 u16 locomp;
381 u16 txcal_coeffs_2G[8];
382 u16 txcal_radio_regs_2G[8];
385 u16 txcal_coeffs_5G[8];
386 u16 txcal_radio_regs_5G[8];
420 u16 txlpf[2];
421 u16 txgm[2];
422 u16 pga[2];
423 u16 pad[2];
424 u16 ipa[2];
437 u16 rssical_radio_regs_2G[2];
438 u16 rssical_phyregs_2G[12];
440 u16 rssical_radio_regs_5G[2];
441 u16 rssical_phyregs_5G[12];
446 u16 txiqlocal_a;
447 u16 txiqlocal_b;
448 u16 txiqlocal_didq;
454 u16 txiqlocal_bestcoeffs[11];
455 u16 txiqlocal_bestcoeffs_valid;
458 u16 analog_gain_ref;
459 u16 lut_begin;
460 u16 lut_end;
461 u16 lut_step;
462 u16 rxcompdbm;
463 u16 papdctrl;
464 u16 sslpnCalibClkEnCtrl;
466 u16 rxiqcal_coeff_a0;
467 u16 rxiqcal_coeff_b0;
479 u16 vid;
480 u16 did;
507 u16 radioid;
519 void (*chanset)(struct brcms_phy *, u16 chanspec);
522 void (*txiqccget)(struct brcms_phy *, u16 *, u16 *);
523 void (*txiqccset)(struct brcms_phy *, u16, u16);
524 u16 (*txloccget)(struct brcms_phy *);
549 u16 radio_chanspec;
551 u16 bw;
596 u16 phy_wreg;
597 u16 phy_wreg_limit;
616 u16 hwpwr_txcur;
628 u16 extlna_type;
631 u16 crsglitch_prev;
652 u16 radiopwr;
653 u16 bb_atten;
654 u16 txctl1;
656 u16 mintxbias;
657 u16 mintxmag;
661 u16 gain_table[TX_GAIN_TABLE_LENGTH];
667 u16 rc_cal;
679 u16 tx_vos;
680 u16 global_tx_bb_dc_bias_loft;
686 u16 *rf_attn_list;
687 u16 *bb_attn_list;
688 u16 padmix_mask;
689 u16 padmix_reg;
690 u16 *txmag_list;
700 u16 freqtrack_saved_regs[2];
715 u16 nphy_txiqlocal_bestc[11];
719 u16 cck2gpo;
740 u16 mcs2gpo[8];
741 u16 mcs5gpo[8];
742 u16 mcs5glpo[8];
743 u16 mcs5ghpo[8];
758 u16 old_bphy_test;
759 u16 old_bphy_testcontrol;
770 u16 mphase_txcal_bestcoeffs[11];
771 u16 nphy_txiqlocal_chanspec;
772 u16 nphy_iqcal_chanspec_2G;
773 u16 nphy_iqcal_chanspec_5G;
774 u16 nphy_rssical_chanspec_2G;
775 u16 nphy_rssical_chanspec_5G;
787 u16 nphy_papd_tx_gain_at_last_cal[2];
797 u16 classifier_state;
798 u16 clip_state[2];
803 u16 rfctrlIntc1_save;
804 u16 rfctrlIntc2_save;
806 u16 tx_rx_cal_radio_saveregs[22];
807 u16 tx_rx_cal_phy_saveregs[15];
812 u16 nphy_cal_orig_tx_gain[2];
814 u16 nphy_txcal_bbmult;
815 u16 nphy_gmval;
817 u16 nphy_saved_bbconf;
822 u16 nphy_rccal_value;
823 u16 nphy_crsminpwr[3];
830 u16 radar_percal_mask;
833 u16 nphy_fineclockgatecontrol;
837 u16 crsminpwr0;
838 u16 crsminpwrl0;
839 u16 crsminpwru0;
841 u16 init_gain_core1;
842 u16 init_gain_core2;
843 u16 init_gainb_core1;
844 u16 init_gainb_core2;
846 u16 init_gain_rfseq[4];
852 u16 tbl_data_hi;
853 u16 tbl_data_lo;
854 u16 tbl_addr;
874 u16 address;
882 u16 address;
888 u16 address;
895 u16 read_phy_reg(struct brcms_phy *pi, u16 addr);
896 void write_phy_reg(struct brcms_phy *pi, u16 addr, u16 val);
897 void and_phy_reg(struct brcms_phy *pi, u16 addr, u16 val);
898 void or_phy_reg(struct brcms_phy *pi, u16 addr, u16 val);
899 void mod_phy_reg(struct brcms_phy *pi, u16 addr, u16 mask, u16 val);
901 u16 read_radio_reg(struct brcms_phy *pi, u16 addr);
902 void or_radio_reg(struct brcms_phy *pi, u16 addr, u16 val);
903 void and_radio_reg(struct brcms_phy *pi, u16 addr, u16 val);
904 void mod_radio_reg(struct brcms_phy *pi, u16 addr, u16 mask, u16 val);
905 void xor_radio_reg(struct brcms_phy *pi, u16 addr, u16 mask);
907 void write_radio_reg(struct brcms_phy *pi, u16 addr, u16 val);
916 u16 tblAddr, u16 tblDataHi, u16 tblDatalo);
919 u16 tblAddr, u16 tblDataHi, u16 tblDatalo);
921 u16 tblAddr, u16 tblDataHi, u16 tblDataLo);
934 u16 core_offset);
955 void wlc_phy_chanspec_set_nphy(struct brcms_phy *pi, u16 chanspec);
956 void wlc_phy_chanspec_set_lcnphy(struct brcms_phy *pi, u16 chanspec);
957 void wlc_phy_chanspec_set_fixup_lcnphy(struct brcms_phy *pi, u16 chanspec);
960 int wlc_phy_chanspec_bandrange_get(struct brcms_phy *, u16 chanspec);
962 void wlc_lcnphy_set_tx_pwr_ctrl(struct brcms_phy *pi, u16 mode);
972 void wlc_lcnphy_start_tx_tone(struct brcms_phy *pi, s32 f_kHz, u16 max_val,
982 u16 wlc_lcnphy_tempsense(struct brcms_phy *pi, bool mode);
1008 void wlc_lcnphy_set_tx_iqcc(struct brcms_phy *pi, u16 a, u16 b);
1009 void wlc_lcnphy_set_tx_locc(struct brcms_phy *pi, u16 didq);
1010 void wlc_lcnphy_get_tx_iqcc(struct brcms_phy *pi, u16 *a, u16 *b);
1011 u16 wlc_lcnphy_get_tx_locc(struct brcms_phy *pi);
1073 u16 wlc_phy_classifier_nphy(struct brcms_phy *pi, u16 mask, u16 val);
1076 u16 num_samps, u8 wait_time, u8 wait_for_crs);
1089 u16 wlc_phy_txpwr_idx_get_nphy(struct brcms_phy *pi);
1105 int wlc_phy_tx_tone_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val, u8 mode,
1121 s8 wlc_phy_upd_rssi_offset(struct brcms_phy *pi, s8 rssi, u16 chanspec);